[llvm-commits] [llvm] r70768 - /llvm/trunk/lib/Target/MSP430/README.txt

[Dan Gohman]

On May 3, 2009, at 6:19 AM, Anton Korobeynikov wrote:
>
> +1. Verify, how stuff is handling implicit zext with 8 bit operands  
> (this might
> +be modelled currently in improper way - should we need to mark the  
> superreg as
> +def for every 8 bit instruction?).

I'm not familiar with MSP430, but this sounds very similar to x86-64's  
implicit
zext with 32-bit operands.   An i64-to-i32 truncate is selected to an
EXTRACT_SUBREG, and an i64-to-i32 zext is selected to a
SUBREG_TO_REG when the operand isn't a truncate.  There's a regular
i32-to-i64 zext instruction which is used when the operand is a  
truncate.

The register coalescer now has a fair amount of support for coalescing
these subreg operations, to eliminate copies.

Dan