[llvm-commits] [llvm] r70741 - in /llvm/trunk/lib/Target/MSP430: MSP430ISelDAGToDAG.cpp MSP430ISelLowering.cpp

[Anton Korobeynikov]

Author: asl
Date: Sun May  3 08:11:35 2009
New Revision: 70741

URL: http://llvm.org/viewvc/llvm-project?rev=70741&view=rev
Log:
Small tweaking

Modified:
    llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
    llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp

Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp?rev=70741&r1=70740&r2=70741&view=diff

==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430ISelDAGToDAG.cpp Sun May  3 08:11:35 2009
@@ -82,10 +82,10 @@
     return true;
   }
 
-  // Operand is a result from ADD with constant operand which fits into i16.
   switch (Addr.getOpcode()) {
   case ISD::ADD:
-    if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
+   // Operand is a result from ADD with constant operand which fits into i16.
+   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Addr.getOperand(1))) {
       uint64_t CVal = CN->getZExtValue();
       // Offset should fit into 16 bits.
       if (((CVal << 48) >> 48) == CVal) {

Modified: llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp?rev=70741&r1=70740&r2=70741&view=diff

==============================================================================
--- llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/MSP430/MSP430ISelLowering.cpp Sun May  3 08:11:35 2009
@@ -54,6 +54,10 @@
   // shifts of the whole bitwidth 1 bit per step.
   setShiftAmountType(MVT::i8);
 
+  setStackPointerRegisterToSaveRestore(MSP430::SPW);
+  setBooleanContents(ZeroOrOneBooleanContent);
+  setSchedulingPreference(SchedulingForLatency);
+
   setLoadExtAction(ISD::EXTLOAD, MVT::i1, Promote);
   setLoadExtAction(ISD::SEXTLOAD, MVT::i1, Promote);
   setLoadExtAction(ISD::ZEXTLOAD, MVT::i1, Promote);