[llvm-commits] [llvm] r70213 - in /llvm/trunk: lib/CodeGen/LiveIntervalAnalysis.cpp test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll

[Evan Cheng]

Author: evancheng
Date: Mon Apr 27 12:36:47 2009
New Revision: 70213

URL: http://llvm.org/viewvc/llvm-project?rev=70213&view=rev
Log:
Fix PR4056. It's possible a physical register def is dead if its implicit use is deleted by two-address pass.

Added:
    llvm/trunk/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll
Modified:
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=70213&r1=70212&r2=70213&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Mon Apr 27 12:36:47 2009
@@ -627,8 +627,8 @@
   
   // The only case we should have a dead physreg here without a killing or
   // instruction where we know it's dead is if it is live-in to the function
-  // and never used.
-  assert(!CopyMI && "physreg was not killed in defining block!");
+  // and never used. Another possible case is the implicit use of the
+  // physical register has been deleted by two-address pass.
   end = start + 1;
 
 exit:

Added: llvm/trunk/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll?rev=70213&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2009-04-27-LiveIntervalsAssert.ll Mon Apr 27 12:36:47 2009
@@ -0,0 +1,24 @@
+; RUN: llvm-as < %s | llc -mtriple=i386-apple-darwin9
+; PR4056
+
+define void @int163(i32 %p_4, i32 %p_5) nounwind {
+entry:
+	%0 = tail call i32 @bar(i32 1) nounwind		; <i32> [#uses=2]
+	%1 = icmp sgt i32 %0, 7		; <i1> [#uses=1]
+	br i1 %1, label %foo.exit, label %bb.i
+
+bb.i:		; preds = %entry
+	%2 = lshr i32 1, %0		; <i32> [#uses=1]
+	%3 = icmp eq i32 %2, 0		; <i1> [#uses=1]
+	%4 = zext i1 %3 to i32		; <i32> [#uses=1]
+	%.p_5 = shl i32 %p_5, %4		; <i32> [#uses=1]
+	br label %foo.exit
+
+foo.exit:		; preds = %bb.i, %entry
+	%5 = phi i32 [ %.p_5, %bb.i ], [ %p_5, %entry ]		; <i32> [#uses=1]
+	%6 = icmp eq i32 %5, 0		; <i1> [#uses=0]
+	%7 = tail call i32 @bar(i32 %p_5) nounwind		; <i32> [#uses=0]
+	ret void
+}
+
+declare i32 @bar(i32)