[llvm-commits] [llvm] r68949 - /llvm/trunk/include/llvm/Target/TargetInstrInfo.h

Dan Gohman gohman at apple.com
Mon Apr 13 08:12:29 PDT 2009


Author: djg
Date: Mon Apr 13 10:12:29 2009
New Revision: 68949

URL: http://llvm.org/viewvc/llvm-project?rev=68949&view=rev
Log:
Add comments to INSERT_SUBREG, EXTRACT_SURBEG, SUBREG_TO_REG,
and IMPLICIT_DEF.

Modified:
    llvm/trunk/include/llvm/Target/TargetInstrInfo.h

Modified: llvm/trunk/include/llvm/Target/TargetInstrInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetInstrInfo.h?rev=68949&r1=68948&r2=68949&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Target/TargetInstrInfo.h (original)
+++ llvm/trunk/include/llvm/Target/TargetInstrInfo.h Mon Apr 13 10:12:29 2009
@@ -50,9 +50,29 @@
     EH_LABEL = 3,
     GC_LABEL = 4,
     DECLARE = 5,
+
+    /// EXTRACT_SUBREG - This instruction takes two operands: a register
+    /// that has subregisters, and a subregister index. It returns the
+    /// extracted subregister value. This is commonly used to implement
+    /// truncation operations on target architectures which support it.
     EXTRACT_SUBREG = 6,
+
+    /// INSERT_SUBREG - This instruction takes three operands: a register
+    /// that has subregisters, a register providing an insert value, and a
+    /// subregister index. It returns the value of the first register with
+    /// the value of the second register inserted. The first register is
+    /// often defined by an IMPLICIT_DEF, as is commonly used to implement
+    /// anyext operations on target architectures which support it.
     INSERT_SUBREG = 7,
+
+    /// IMPLICIT_DEF - This is the MachineInstr-level equivalent of undef.
     IMPLICIT_DEF = 8,
+
+    /// SUBREG_TO_REG - This instruction is similar to INSERT_SUBREG except
+    /// that the first operand is an immediate integer constant. This constant
+    /// is often zero, as is commonly used to implement zext operations on
+    /// target architectures which support it, such as with x86-64 (with
+    /// zext from i32 to i64 via implicit zero-extension).
     SUBREG_TO_REG = 9
   };
 





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