[llvm-commits] [llvm] r68576 - in /llvm/trunk: include/llvm/Target/ lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Target/X86/ test/CodeGen/X86/

[Sanjiv.Gupta at microchip.com]

>>> +  assert(Op.getNode()->getNumValues() == 1 &&
>>> +         "ShrinkDemandedOp only supports nodes with one result!");
>>> +
>> This assert breaks via visitADD, when the ADD operation also  
>> produces a
>> carry, so Op.getNode()->getNumValues() is 2 there.

>ADD always has one result. ADDC and UADDO are used to represent an add
>with a carry result.

>Dan

Thanks Dan,
This helped us figure out a mistake where we were lowering an ADD to ADDC in PIC16 port.


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