[llvm-commits] [llvm] r68734 - /llvm/trunk/lib/CodeGen/MachineInstr.cpp

[Chris Lattner]

Author: lattner
Date: Thu Apr  9 18:33:34 2009
New Revision: 68734

URL: http://llvm.org/viewvc/llvm-project?rev=68734&view=rev
Log:
ignore register zero in isRegTiedToUseOperand, following the example of
isRegTiedToDefOperand.  Thanks to Bob for pointing this out!


Modified:
    llvm/trunk/lib/CodeGen/MachineInstr.cpp

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=68734&r1=68733&r2=68734&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Thu Apr  9 18:33:34 2009
@@ -698,7 +698,7 @@
   if (getOpcode() == TargetInstrInfo::INLINEASM) {
     assert(DefOpIdx >= 2);
     const MachineOperand &MO = getOperand(DefOpIdx);
-    if (!MO.isReg() || !MO.isDef())
+    if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0)
       return false;
     // Determine the actual operand no corresponding to this index.
     unsigned DefNo = 0;