[llvm-commits] [llvm] r68398 - in /llvm/trunk: lib/CodeGen/SelectionDAG/TargetLowering.cpp test/CodeGen/X86/and-su.ll

[Dan Gohman]

Author: djg
Date: Fri Apr  3 15:11:30 2009
New Revision: 68398

URL: http://llvm.org/viewvc/llvm-project?rev=68398&view=rev
Log:
Fix a TargetLowering optimization so that it doesn't duplicate
loads when an input node has multiple uses.

Added:
    llvm/trunk/test/CodeGen/X86/and-su.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=68398&r1=68397&r2=68398&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Fri Apr  3 15:11:30 2009
@@ -1464,6 +1464,7 @@
       // in the same partial word, see if we can shorten the load.
       if (DCI.isBeforeLegalize() &&
           N0.getOpcode() == ISD::AND && C1 == 0 &&
+          N0.getNode()->hasOneUse() &&
           isa<LoadSDNode>(N0.getOperand(0)) &&
           N0.getOperand(0).getNode()->hasOneUse() &&
           isa<ConstantSDNode>(N0.getOperand(1))) {

Added: llvm/trunk/test/CodeGen/X86/and-su.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/and-su.ll?rev=68398&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/and-su.ll (added)
+++ llvm/trunk/test/CodeGen/X86/and-su.ll Fri Apr  3 15:11:30 2009
@@ -0,0 +1,16 @@
+; RUN: llvm-as < %s | llc -march=x86 | grep {(%} | count 1
+
+; Don't duplicate the load.
+
+define fastcc i32 @foo(i32* %p) nounwind {
+	%t0 = load i32* %p
+	%t2 = and i32 %t0, 10
+	%t3 = icmp ne i32 %t2, 0
+	br i1 %t3, label %bb63, label %bb76
+
+bb63:
+	ret i32 %t2
+
+bb76:
+	ret i32 0
+}