[llvm-commits] [llvm] r66922 - in /llvm/trunk: lib/Target/X86/X86InstrInfo.td test/CodeGen/X86/tls13.ll test/CodeGen/X86/tls14.ll

[Rafael Espindola]

> Instead of making it TLS specific, I'd just make that operand "specify
> the segment".  Even though we do nothing with FS or ES or DS etc, it
> would be nice to be able to have a clean model where the instructions
> think about these machine level things, and isel lowering handles the
> translation of "TLS to GS"

I have started to work on it, but there lots of places in the code that
assume that addresses are made of 4 components. I did a bit
of code factoring, but the real problem is that there no C++
class that corresponds to an address.

The real solution I can think is to make an instruction like

movl       %gs:0, %eax

have 2 operands. The first one is the address, the
second one is the register. The address is then a C++
object with the needed fields.

Is there a reason for the current design? Efficiency maybe?

Anyway. My work in progress patch is attached. It fails only
the TLS tests, as expected :-)

Will do a tiny bit more factoring and then actually set the
segment correctly.

Comments?

> -Chris

Cheers,
-- 
Rafael Avila de Espindola

Google | Gordon House | Barrow Street | Dublin 4 | Ireland
Registered in Dublin, Ireland | Registration Number: 368047
-------------- next part --------------
A non-text attachment was scrubbed...
Name: llvm-wip.patch
Type: application/octet-stream
Size: 23576 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20090328/0cf3c30b/attachment.obj>