[llvm-commits] [llvm] r67785 - in /llvm/branches/Apple/Dib: lib/Target/ARM/ARMISelDAGToDAG.cpp lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/2009-03-25-TestBug.ll
Bill Wendling
isanbard at gmail.com
Thu Mar 26 16:10:18 PDT 2009
Author: void
Date: Thu Mar 26 18:10:18 2009
New Revision: 67785
URL: http://llvm.org/viewvc/llvm-project?rev=67785&view=rev
Log:
--- Merging (from foreign repository) r67765 into '.':
U lib/Target/ARM/ARMISelDAGToDAG.cpp
--- Merging (from foreign repository) r67784 into '.':
U lib/Target/X86/X86ISelLowering.cpp
-no-implicit-float means explicit fp operations are legal.
--- Merging (from foreign repository) r67783 into '.':
U test/CodeGen/X86/2009-03-25-TestBug.ll
Add -march=x86.
Modified:
llvm/branches/Apple/Dib/lib/Target/ARM/ARMISelDAGToDAG.cpp
llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp
llvm/branches/Apple/Dib/test/CodeGen/X86/2009-03-25-TestBug.ll
Modified: llvm/branches/Apple/Dib/lib/Target/ARM/ARMISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/ARM/ARMISelDAGToDAG.cpp?rev=67785&r1=67784&r2=67785&view=diff
==============================================================================
--- llvm/branches/Apple/Dib/lib/Target/ARM/ARMISelDAGToDAG.cpp (original)
+++ llvm/branches/Apple/Dib/lib/Target/ARM/ARMISelDAGToDAG.cpp Thu Mar 26 18:10:18 2009
@@ -595,6 +595,8 @@
}
}
case ISD::ADD: {
+ if (!Subtarget->isThumb())
+ break;
// Select add sp, c to tADDhirr.
SDValue N0 = Op.getOperand(0);
SDValue N1 = Op.getOperand(1);
Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp?rev=67785&r1=67784&r2=67785&view=diff
==============================================================================
--- llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp Thu Mar 26 18:10:18 2009
@@ -500,7 +500,7 @@
}
// Long double always uses X87.
- if (!UseSoftFloat && !NoImplicitFloat) {
+ if (!UseSoftFloat) {
addRegisterClass(MVT::f80, X86::RFP80RegisterClass);
setOperationAction(ISD::UNDEF, MVT::f80, Expand);
setOperationAction(ISD::FCOPYSIGN, MVT::f80, Expand);
@@ -589,7 +589,7 @@
// FIXME: In order to prevent SSE instructions being expanded to MMX ones
// with -msoft-float, disable use of MMX as well.
- if (!UseSoftFloat && !NoImplicitFloat && !DisableMMX && Subtarget->hasMMX()) {
+ if (!UseSoftFloat && !DisableMMX && Subtarget->hasMMX()) {
addRegisterClass(MVT::v8i8, X86::VR64RegisterClass);
addRegisterClass(MVT::v4i16, X86::VR64RegisterClass);
addRegisterClass(MVT::v2i32, X86::VR64RegisterClass);
@@ -669,7 +669,7 @@
setOperationAction(ISD::SELECT, MVT::v1i64, Custom);
}
- if (!UseSoftFloat && !NoImplicitFloat && Subtarget->hasSSE1()) {
+ if (!UseSoftFloat && Subtarget->hasSSE1()) {
addRegisterClass(MVT::v4f32, X86::VR128RegisterClass);
setOperationAction(ISD::FADD, MVT::v4f32, Legal);
@@ -686,7 +686,7 @@
setOperationAction(ISD::VSETCC, MVT::v4f32, Custom);
}
- if (!UseSoftFloat && !NoImplicitFloat && Subtarget->hasSSE2()) {
+ if (!UseSoftFloat && Subtarget->hasSSE2()) {
addRegisterClass(MVT::v2f64, X86::VR128RegisterClass);
// FIXME: Unfortunately -soft-float and -no-implicit-float means XMM
Modified: llvm/branches/Apple/Dib/test/CodeGen/X86/2009-03-25-TestBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/test/CodeGen/X86/2009-03-25-TestBug.ll?rev=67785&r1=67784&r2=67785&view=diff
==============================================================================
--- llvm/branches/Apple/Dib/test/CodeGen/X86/2009-03-25-TestBug.ll (original)
+++ llvm/branches/Apple/Dib/test/CodeGen/X86/2009-03-25-TestBug.ll Thu Mar 26 18:10:18 2009
@@ -1,4 +1,4 @@
-; RUN: llvm-as < %s | llc -o %t -f
+; RUN: llvm-as < %s | llc -march=x86 -o %t -f
; RUN: not grep and %t
; RUN: not grep shr %t
; rdar://6661955
More information about the llvm-commits
mailing list