[llvm-commits] [llvm] r67335 - in /llvm/trunk: include/llvm/CodeGen/MachineInstr.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/MachineInstr.cpp lib/CodeGen/RegAllocLocal.cpp lib/CodeGen/Spiller.cpp lib/CodeGen/TwoAddressInstructionPass.cpp
Evan Cheng
evan.cheng at apple.com
Thu Mar 19 13:30:07 PDT 2009
Author: evancheng
Date: Thu Mar 19 15:30:06 2009
New Revision: 67335
URL: http://llvm.org/viewvc/llvm-project?rev=67335&view=rev
Log:
Added MachineInstr::isRegTiedToDefOperand to check for two-addressness.
Modified:
llvm/trunk/include/llvm/CodeGen/MachineInstr.h
llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
llvm/trunk/lib/CodeGen/MachineInstr.cpp
llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
llvm/trunk/lib/CodeGen/Spiller.cpp
llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=67335&r1=67334&r2=67335&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Thu Mar 19 15:30:06 2009
@@ -245,6 +245,11 @@
/// check if the register def is a re-definition due to two addr elimination.
bool isRegReDefinedByTwoAddr(unsigned DefIdx) const;
+ /// isRegTiedToDefOperand - Return true if the use operand of the specified
+ /// index is tied to an def operand. It also returns the def operand index by
+ /// reference if DefOpIdx is not null.
+ bool isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx = 0);
+
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
void copyKillDeadInfo(const MachineInstr *MI);
Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=67335&r1=67334&r2=67335&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Mar 19 15:30:06 2009
@@ -1062,8 +1062,6 @@
SmallVector<unsigned, 2> &Ops,
unsigned &MRInfo,
SmallVector<unsigned, 2> &FoldOps) {
- const TargetInstrDesc &TID = MI->getDesc();
-
MRInfo = 0;
for (unsigned i = 0, e = Ops.size(); i != e; ++i) {
unsigned OpIdx = Ops[i];
@@ -1075,8 +1073,7 @@
MRInfo |= (unsigned)VirtRegMap::isMod;
else {
// Filter out two-address use operand(s).
- if (!MO.isImplicit() &&
- TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1) {
+ if (MI->isRegTiedToDefOperand(OpIdx)) {
MRInfo = VirtRegMap::isModRef;
continue;
}
@@ -2160,8 +2157,7 @@
MachineInstr *LastUse = getInstructionFromIndex(LastUseIdx);
int UseIdx = LastUse->findRegisterUseOperandIdx(LI->reg, false);
assert(UseIdx != -1);
- if (LastUse->getOperand(UseIdx).isImplicit() ||
- LastUse->getDesc().getOperandConstraint(UseIdx,TOI::TIED_TO) == -1){
+ if (!LastUse->isRegTiedToDefOperand(UseIdx)) {
LastUse->getOperand(UseIdx).setIsKill();
vrm.addKillPoint(LI->reg, LastUseIdx);
}
Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=67335&r1=67334&r2=67335&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Thu Mar 19 15:30:06 2009
@@ -689,7 +689,7 @@
return -1;
}
-/// isRegReDefinedByTwoAddr - Given the index of a register def operand,
+/// isRegReDefinedByTwoAddr - Given the index of a register operand,
/// check if the register def is a re-definition due to two addr elimination.
bool MachineInstr::isRegReDefinedByTwoAddr(unsigned DefIdx) const{
assert(getOperand(DefIdx).isDef() && "DefIdx is not a def!");
@@ -703,6 +703,24 @@
return false;
}
+/// isRegTiedToDefOperand - Return true if the operand of the specified index
+/// is a register use and it is tied to an def operand. It also returns the def
+/// operand index by reference.
+bool MachineInstr::isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx){
+ const TargetInstrDesc &TID = getDesc();
+ if (UseOpIdx >= TID.getNumOperands())
+ return false;
+ const MachineOperand &MO = getOperand(UseOpIdx);
+ if (!MO.isReg() || !MO.isUse())
+ return false;
+ int DefIdx = TID.getOperandConstraint(UseOpIdx, TOI::TIED_TO);
+ if (DefIdx == -1)
+ return false;
+ if (DefOpIdx)
+ *DefOpIdx = (unsigned)DefIdx;
+ return true;
+}
+
/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
///
void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=67335&r1=67334&r2=67335&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Thu Mar 19 15:30:06 2009
@@ -695,7 +695,7 @@
if (isPhysReg || !usedOutsideBlock) {
if (MO.isUse()) {
// Don't mark uses that are tied to defs as kills.
- if (MI->getDesc().getOperandConstraint(idx, TOI::TIED_TO) == -1)
+ if (!MI->isRegTiedToDefOperand(idx))
MO.setIsKill(true);
} else
MO.setIsDead(true);
Modified: llvm/trunk/lib/CodeGen/Spiller.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/Spiller.cpp?rev=67335&r1=67334&r2=67335&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/Spiller.cpp (original)
+++ llvm/trunk/lib/CodeGen/Spiller.cpp Thu Mar 19 15:30:06 2009
@@ -233,8 +233,7 @@
KillOps[Reg]->setIsKill(false);
KillOps[Reg] = NULL;
RegKills.reset(Reg);
- if (i < TID.getNumOperands() &&
- TID.getOperandConstraint(i, TOI::TIED_TO) == -1)
+ if (!MI.isRegTiedToDefOperand(i))
// Unless it's a two-address operand, this is the new kill.
MO.setIsKill();
}
@@ -748,8 +747,8 @@
int UseIdx = DefMI->findRegisterUseOperandIdx(DestReg, false);
if (UseIdx == -1)
return false;
- int DefIdx = TID.getOperandConstraint(UseIdx, TOI::TIED_TO);
- if (DefIdx == -1)
+ unsigned DefIdx;
+ if (!MI.isRegTiedToDefOperand(UseIdx, &DefIdx))
return false;
assert(DefMI->getOperand(DefIdx).isReg() &&
DefMI->getOperand(DefIdx).getReg() == SrcReg);
@@ -890,7 +889,7 @@
continue;
if (!LastUD || (LastUD->isUse() && MO.isDef()))
LastUD = &MO;
- if (TID.getOperandConstraint(i, TOI::TIED_TO) != -1)
+ if (LastUDMI->isRegTiedToDefOperand(i))
return;
}
if (LastUD->isDef())
@@ -1168,8 +1167,8 @@
// aren't allowed to modify the reused register. If none of these cases
// apply, reuse it.
bool CanReuse = true;
- int ti = TID.getOperandConstraint(i, TOI::TIED_TO);
- if (ti != -1) {
+ bool isTied = MI.isRegTiedToDefOperand(i);
+ if (isTied) {
// Okay, we have a two address operand. We can reuse this physreg as
// long as we are allowed to clobber the value and there isn't an
// earlier def that has already clobbered the physreg.
@@ -1206,7 +1205,7 @@
// we can get at R0 or its alias.
ReusedOperands.addReuse(i, ReuseSlot, PhysReg,
VRM.getPhys(VirtReg), VirtReg);
- if (ti != -1)
+ if (isTied)
// Only mark it clobbered if this is a use&def operand.
ReusedOperands.markClobbered(PhysReg);
++NumReused;
@@ -1226,7 +1225,7 @@
// Mark is isKill if it's there no other uses of the same virtual
// register and it's not a two-address operand. IsKill will be
// unset if reg is reused.
- if (ti == -1 && KilledMIRegs.count(VirtReg) == 0) {
+ if (!isTied && KilledMIRegs.count(VirtReg) == 0) {
MI.getOperand(i).setIsKill();
KilledMIRegs.insert(VirtReg);
}
@@ -1325,7 +1324,7 @@
Spills.addAvailable(SSorRMId, PhysReg);
// Assumes this is the last use. IsKill will be unset if reg is reused
// unless it's a two-address operand.
- if (TID.getOperandConstraint(i, TOI::TIED_TO) == -1 &&
+ if (!MI.isRegTiedToDefOperand(i) &&
KilledMIRegs.count(VirtReg) == 0) {
MI.getOperand(i).setIsKill();
KilledMIRegs.insert(VirtReg);
Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=67335&r1=67334&r2=67335&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original)
+++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Thu Mar 19 15:30:06 2009
@@ -234,7 +234,7 @@
for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
MachineOperand &MO = UseMI->getOperand(i);
if (MO.isReg() && MO.getReg() == Reg &&
- (MO.isDef() || TID.getOperandConstraint(i, TOI::TIED_TO) != -1))
+ (MO.isDef() || UseMI->isRegTiedToDefOperand(i)))
// Earlier use is a two-address one.
return true;
}
@@ -338,8 +338,8 @@
const MachineOperand &MO = MI.getOperand(i);
if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg)
continue;
- int ti = TID.getOperandConstraint(i, TOI::TIED_TO);
- if (ti != -1) {
+ unsigned ti;
+ if (MI.isRegTiedToDefOperand(i, &ti)) {
DstReg = MI.getOperand(ti).getReg();
return true;
}
@@ -635,8 +635,8 @@
ProcessCopy(&*mi, &*mbbi, Processed);
for (unsigned si = 1, e = TID.getNumOperands(); si < e; ++si) {
- int ti = TID.getOperandConstraint(si, TOI::TIED_TO);
- if (ti == -1)
+ unsigned ti = 0;
+ if (!mi->isRegTiedToDefOperand(si, &ti))
continue;
if (FirstTied) {
@@ -669,7 +669,7 @@
// b + a for example) because our transformation will not work. This
// should never occur because we are in SSA form.
for (unsigned i = 0; i != mi->getNumOperands(); ++i)
- assert((int)i == ti ||
+ assert(i == ti ||
!mi->getOperand(i).isReg() ||
mi->getOperand(i).getReg() != regA);
#endif
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