[llvm-commits] [llvm] r66499 - /llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp

[Dan Gohman]

Author: djg
Date: Mon Mar  9 18:25:06 2009
New Revision: 66499

URL: http://llvm.org/viewvc/llvm-project?rev=66499&view=rev
Log:
Merge from trunk:

r66206 | djg | 2009-03-05 13:29:28 -0800 (Thu, 05 Mar 2009) | 4 lines

When creating X86ISD::INC and X86ISD::DEC nodes, only add one operand.
The extra operand didn't appear to cause any trouble, but it was
erroneous regardless.

Modified:
    llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp?rev=66499&r1=66498&r2=66499&view=diff

==============================================================================
--- llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp Mon Mar  9 18:25:06 2009
@@ -5354,6 +5354,7 @@
   // doing a separate TEST.
   if (Op.getResNo() == 0) {
     unsigned Opcode = 0;
+    unsigned NumOperands = 0;
     switch (Op.getNode()->getOpcode()) {
     case ISD::ADD:
       // Due to an isel shortcoming, be conservative if this add is likely to
@@ -5371,16 +5372,19 @@
         // An add of one will be selected as an INC.
         if (C->getAPIntValue() == 1) {
           Opcode = X86ISD::INC;
+          NumOperands = 1;
           break;
         }
         // An add of negative one (subtract of one) will be selected as a DEC.
         if (C->getAPIntValue().isAllOnesValue()) {
           Opcode = X86ISD::DEC;
+          NumOperands = 1;
           break;
         }
       }
       // Otherwise use a regular EFLAGS-setting add.
       Opcode = X86ISD::ADD;
+      NumOperands = 2;
       break;
     case ISD::SUB:
       // Due to the ISEL shortcoming noted above, be conservative if this sub is
@@ -5391,6 +5395,7 @@
           goto default_case;
       // Otherwise use a regular EFLAGS-setting sub.
       Opcode = X86ISD::SUB;
+      NumOperands = 2;
       break;
     case X86ISD::ADD:
     case X86ISD::SUB:
@@ -5404,7 +5409,7 @@
     if (Opcode != 0) {
       const MVT *VTs = DAG.getNodeValueTypes(Op.getValueType(), MVT::i32);
       SmallVector<SDValue, 4> Ops;
-      for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i)
+      for (unsigned i = 0, e = NumOperands; i != e; ++i)
         Ops.push_back(Op.getOperand(i));
       SDValue New = DAG.getNode(Opcode, dl, VTs, 2, &Ops[0], Ops.size());
       DAG.ReplaceAllUsesWith(Op, New);