[llvm-commits] [llvm] r66428 - in /llvm/trunk: lib/CodeGen/VirtRegMap.cpp test/CodeGen/X86/2009-03-09-SpillerBug.ll

Evan Cheng evan.cheng at apple.com
Mon Mar 9 12:00:05 PDT 2009


Author: evancheng
Date: Mon Mar  9 14:00:05 2009
New Revision: 66428

URL: http://llvm.org/viewvc/llvm-project?rev=66428&view=rev
Log:
Yet another case where the spiller marked two uses of the same register on the same instruction as kill. This fixes PR3706.

Added:
    llvm/trunk/test/CodeGen/X86/2009-03-09-SpillerBug.ll
Modified:
    llvm/trunk/lib/CodeGen/VirtRegMap.cpp

Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=66428&r1=66427&r2=66428&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Mon Mar  9 14:00:05 2009
@@ -1317,23 +1317,6 @@
   }
 }
 
-/// hasLaterNon2AddrUse - If the MI has another use of the specified virtual
-/// register later and it's not a two-address, return true. That means it's
-/// safe to mark the current use at 'i' isKill.
-static bool hasLaterNon2AddrUse(MachineInstr &MI, unsigned i, unsigned VirtReg){
-  const TargetInstrDesc &TID = MI.getDesc();
-
-  ++i;
-  for (unsigned e = TID.getNumOperands(); i != e; ++i) {
-    const MachineOperand &MO = MI.getOperand(i);
-    if (!MO.isReg() || MO.getReg() != VirtReg)
-      continue;
-    if (TID.getOperandConstraint(i, TOI::TIED_TO) == -1)
-      return true;
-  }
-  return false;
-}
-
 /// rewriteMBB - Keep track of which spills are available even after the
 /// register allocator is done with them.  If possible, avid reloading vregs.
 void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
@@ -1357,6 +1340,7 @@
   SmallSet<MachineInstr*, 4> ReMatDefs;
 
   // Clear kill info.
+  SmallSet<unsigned, 2> KilledMIRegs;
   RegKills.reset();
   KillOps.clear();
   KillOps.resize(TRI->getNumRegs(), NULL);
@@ -1539,6 +1523,7 @@
 
     // Process all of the spilled uses and all non spilled reg references.
     SmallVector<int, 2> PotentialDeadStoreSlots;
+    KilledMIRegs.clear();
     for (unsigned j = 0, e = VirtUseOps.size(); j != e; ++j) {
       unsigned i = VirtUseOps[j];
       MachineOperand &MO = MI.getOperand(i);
@@ -1655,8 +1640,11 @@
           // Mark is isKill if it's there no other uses of the same virtual
           // register and it's not a two-address operand. IsKill will be
           // unset if reg is reused.
-          if (ti == -1 && !hasLaterNon2AddrUse(MI, i, VirtReg))
+          if (ti == -1 && KilledMIRegs.count(VirtReg) == 0) {
             MI.getOperand(i).setIsKill();
+            KilledMIRegs.insert(VirtReg);
+          }
+
           continue;
         }  // CanReuse
         
@@ -1751,8 +1739,11 @@
       Spills.addAvailable(SSorRMId, PhysReg);
       // Assumes this is the last use. IsKill will be unset if reg is reused
       // unless it's a two-address operand.
-      if (TID.getOperandConstraint(i, TOI::TIED_TO) == -1)
+      if (TID.getOperandConstraint(i, TOI::TIED_TO) == -1 &&
+          KilledMIRegs.count(VirtReg) == 0) {
         MI.getOperand(i).setIsKill();
+        KilledMIRegs.insert(VirtReg);
+      }
       unsigned RReg = SubIdx ? TRI->getSubReg(PhysReg, SubIdx) : PhysReg;
       MI.getOperand(i).setReg(RReg);
       UpdateKills(*prior(MII), RegKills, KillOps, TRI);

Added: llvm/trunk/test/CodeGen/X86/2009-03-09-SpillerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-03-09-SpillerBug.ll?rev=66428&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-03-09-SpillerBug.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2009-03-09-SpillerBug.ll Mon Mar  9 14:00:05 2009
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -mtriple=i386-pc-linux-gnu
+; PR3706
+
+define void @__mulxc3(x86_fp80 %b) nounwind {
+entry:
+	%call = call x86_fp80 @y(x86_fp80* null, x86_fp80* null)		; <x86_fp80> [#uses=0]
+	%cmp = fcmp ord x86_fp80 %b, 0xK00000000000000000000		; <i1> [#uses=1]
+	%sub = sub x86_fp80 %b, %b		; <x86_fp80> [#uses=1]
+	%cmp7 = fcmp uno x86_fp80 %sub, 0xK00000000000000000000		; <i1> [#uses=1]
+	%and12 = and i1 %cmp7, %cmp		; <i1> [#uses=1]
+	%and = zext i1 %and12 to i32		; <i32> [#uses=1]
+	%conv9 = sitofp i32 %and to x86_fp80		; <x86_fp80> [#uses=1]
+	store x86_fp80 %conv9, x86_fp80* null
+	store x86_fp80 %b, x86_fp80* null
+	ret void
+}
+
+declare x86_fp80 @y(x86_fp80*, x86_fp80*)





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