[llvm-commits] [llvm] r65996 - in /llvm/trunk: lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp lib/Target/X86/X86RegisterInfo.td test/CodeGen/X86/pr3701.ll

[Dan Gohman]

On Mar 4, 2009, at 12:02 PM, Eli Friedman wrote:

> On Wed, Mar 4, 2009 at 11:44 AM, Dan Gohman <gohman at apple.com> wrote:
>>
>> On Mar 3, 2009, at 6:48 PM, Evan Cheng wrote:
>>
>>>
>>> On Mar 3, 2009, at 6:00 PM, Dan Gohman wrote:
>>>
>>>>
>>>> On Mar 3, 2009, at 5:41 PM, Evan Cheng wrote:
>>>>
>>>>> Author: evancheng
>>>>> Date: Tue Mar  3 19:41:49 2009
>>>>> New Revision: 65996
>>>>>
>>>>> URL: http://llvm.org/viewvc/llvm-project?rev=65996&view=rev
>>>>> Log:
>>>>> Fix PR3701. 1. X86 target renamed eflags register to flags. This
>>>>> matches what llvm-gcc generates so codegen knows flags register is
>>>>> being clobbered by inline asm. 2. BURR scheduler should also check
>>>>> if inline asm nodes can clobber "live" physical registers.
>>>>> Previously it was only checking target nodes with implicit defs.
>>>>
>>>> What about the "~{dirflag}" part? Since DF isn't modeled
>>>> separately, should "dirflag" be mapped to "flags"?
>>>
>>> Registers are matched by name. I don't see a need to special case  
>>> this
>>> since all 3 flag registers are added to inline asm instructions.
>>
>> But now, IR with just "dirflag" clobbered, and not "flags", would be
>> handled incorrectly.
>
> llvm-gcc is lying; inline asm doesn't clobber the direction flag.


The comments with ix86_md_asm_clobbers suggest that dirflag is
always marked clobbered in order to preserve compatibility with
inline asms developed with earlier versions of GCC.

But regardless, if an inline asm in LLVM IR can list "dirflag"
as a clobber, codegen should be able to handle it correctly.

Also, it looks like "cc" should also get mapped to "flags".

Dan