[llvm-commits] [llvm] r65282 - in /llvm/branches/Apple/Dib: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/ARM/pr3502.ll

Bill Wendling isanbard at gmail.com
Sun Feb 22 00:43:01 PST 2009


Author: void
Date: Sun Feb 22 02:43:01 2009
New Revision: 65282

URL: http://llvm.org/viewvc/llvm-project?rev=65282&view=rev
Log:
Pull r65279 into Dib:

If a use operand is marked isKill, don't forget to add kill to its live interval
as well.

Added:
    llvm/branches/Apple/Dib/test/CodeGen/ARM/pr3502.ll
      - copied unchanged from r65279, llvm/trunk/test/CodeGen/ARM/pr3502.ll
Modified:
    llvm/branches/Apple/Dib/lib/CodeGen/SimpleRegisterCoalescing.cpp

Modified: llvm/branches/Apple/Dib/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=65282&r1=65281&r2=65282&view=diff

==============================================================================
--- llvm/branches/Apple/Dib/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/branches/Apple/Dib/lib/CodeGen/SimpleRegisterCoalescing.cpp Sun Feb 22 02:43:01 2009
@@ -519,6 +519,7 @@
     // of last use.
     LastUse->setIsKill();
     removeRange(li, li_->getDefIndex(LastUseIdx), LR->end, li_, tri_);
+    li.addKill(LR->valno, LastUseIdx+1);
     unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx;
     if (tii_->isMoveInstr(*LastUseMI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) &&
         DstReg == li.reg) {
@@ -967,9 +968,10 @@
       LastUse = MO;
     }
   }
-  if (LastUse)
+  if (LastUse) {
     LastUse->setIsKill();
-  else {
+    li.addKill(VNI, LastUseIdx+1);
+  } else {
     // Remove dead implicit_def's.
     while (!ImpDefs.empty()) {
       MachineInstr *ImpDef = ImpDefs.back();
@@ -2331,7 +2333,7 @@
       unsigned Idx = li_->getInstructionIndex(UseMI);
       if (Idx >= Start && Idx < End && Idx >= UseIdx) {
         LastUse = &Use;
-        UseIdx = Idx;
+        UseIdx = li_->getUseIndex(Idx);
       }
     }
     return LastUse;
@@ -2357,7 +2359,7 @@
         MachineOperand &Use = MI->getOperand(i);
         if (Use.isReg() && Use.isUse() && Use.getReg() &&
             tri_->regsOverlap(Use.getReg(), Reg)) {
-          UseIdx = e;
+          UseIdx = li_->getUseIndex(e);
           return &Use;
         }
       }





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