[llvm-commits] [llvm] r65277 - in /llvm/branches/Apple/Dib: lib/Target/X86/X86CallingConv.td lib/Target/X86/X86ISelLowering.cpp lib/Target/X86/X86InstrInfo.cpp test/CodeGen/X86/ret-mmx.ll
Bill Wendling
isanbard at gmail.com
Sun Feb 22 00:15:55 PST 2009
Author: void
Date: Sun Feb 22 02:15:54 2009
New Revision: 65277
URL: http://llvm.org/viewvc/llvm-project?rev=65277&view=rev
Log:
Merge r65273 into Dib:
Do not consider MMX_MOVD64rr a move instructions. The source register is in
GR32, the destination is VR64. They are not compatible.
Merge r65274 into Dib:
Be bug compatible with gcc by returning MMX values in RAX.
Modified:
llvm/branches/Apple/Dib/lib/Target/X86/X86CallingConv.td
llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp
llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.cpp
llvm/branches/Apple/Dib/test/CodeGen/X86/ret-mmx.ll
Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86CallingConv.td
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86CallingConv.td?rev=65277&r1=65276&r2=65277&view=diff
==============================================================================
--- llvm/branches/Apple/Dib/lib/Target/X86/X86CallingConv.td (original)
+++ llvm/branches/Apple/Dib/lib/Target/X86/X86CallingConv.td Sun Feb 22 02:15:54 2009
@@ -72,8 +72,9 @@
CCIfType<[f32], CCAssignToReg<[XMM0, XMM1]>>,
CCIfType<[f64], CCAssignToReg<[XMM0, XMM1]>>,
- // MMX vector types are always returned in XMM0.
- CCIfType<[v8i8, v4i16, v2i32, v1i64, v2f32], CCAssignToReg<[XMM0, XMM1]>>,
+ // MMX vector types are always returned in RAX. This seems to disagree with
+ // ABI documentation but is bug compatible with gcc.
+ CCIfType<[v8i8, v4i16, v2i32, v1i64, v2f32], CCAssignToReg<[RAX]>>,
CCDelegateTo<RetCC_X86Common>
]>;
Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp?rev=65277&r1=65276&r2=65277&view=diff
==============================================================================
--- llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/branches/Apple/Dib/lib/Target/X86/X86ISelLowering.cpp Sun Feb 22 02:15:54 2009
@@ -997,6 +997,14 @@
continue;
}
+ // 64-bit vector (MMX) values are returned in RAX.
+ if (Subtarget->is64Bit()) {
+ MVT ValVT = ValToCopy.getValueType();
+ if (VA.getLocReg() == X86::RAX &&
+ ValVT.isVector() && ValVT.getSizeInBits() == 64)
+ ValToCopy = DAG.getNode(ISD::BIT_CONVERT, dl, MVT::i64, ValToCopy);
+ }
+
Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), ValToCopy, Flag);
Flag = Chain.getValue(1);
}
@@ -1073,13 +1081,10 @@
SDValue Val;
if (Is64Bit && CopyVT.isVector() && CopyVT.getSizeInBits() == 64) {
- // For x86-64, MMX values are returned in XMM0 and XMM1. Issue an
- // extract_vector_elt to i64 and then bit_convert it to the desired type.
+ // For x86-64, MMX values are returned in RAX.
Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
- MVT::v2i64, InFlag).getValue(1);
+ MVT::i64, InFlag).getValue(1);
Val = Chain.getValue(0);
- Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64,
- Val, DAG.getConstant(0, MVT::i64));
Val = DAG.getNode(ISD::BIT_CONVERT, dl, CopyVT, Val);
} else {
Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
Modified: llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.cpp?rev=65277&r1=65276&r2=65277&view=diff
==============================================================================
--- llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.cpp (original)
+++ llvm/branches/Apple/Dib/lib/Target/X86/X86InstrInfo.cpp Sun Feb 22 02:15:54 2009
@@ -691,7 +691,6 @@
case X86::MOVSD2PDrr:
case X86::MOVPS2SSrr:
case X86::MOVPD2SDrr:
- case X86::MMX_MOVD64rr:
case X86::MMX_MOVQ64rr:
assert(MI.getNumOperands() >= 2 &&
MI.getOperand(0).isReg() &&
Modified: llvm/branches/Apple/Dib/test/CodeGen/X86/ret-mmx.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/branches/Apple/Dib/test/CodeGen/X86/ret-mmx.ll?rev=65277&r1=65276&r2=65277&view=diff
==============================================================================
--- llvm/branches/Apple/Dib/test/CodeGen/X86/ret-mmx.ll (original)
+++ llvm/branches/Apple/Dib/test/CodeGen/X86/ret-mmx.ll Sun Feb 22 02:15:54 2009
@@ -3,11 +3,15 @@
@g_v1di = external global <1 x i64>
-define void @test_v1di() nounwind {
+define void @t1() nounwind {
entry:
%call = call <1 x i64> @return_v1di() ; <<1 x i64>> [#uses=0]
store <1 x i64> %call, <1 x i64>* @g_v1di
ret void
}
+define <1 x i64> @t2() nounwind {
+ ret <1 x i64> <i64 1>
+}
+
declare <1 x i64> @return_v1di()
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