[llvm-commits] [llvm] r65152 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/ret-mmx.ll

[Evan Cheng]

On Feb 20, 2009, at 9:26 PM, Nick Lewycky wrote:

> Evan Cheng wrote:
>> Author: evancheng
>> Date: Fri Feb 20 14:43:02 2009
>> New Revision: 65152
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=65152&view=rev
>> Log:
>> Support return of MMX values in 64-bit mode.
>
> Evan, this is causing a failure on the linux-ppc tester. (You might be
> able to reproduce this on a darwin-ppc too.) The failure is:
>
> FAIL: /home/buildbot-llvm/1/llvm-ppc/build/test/CodeGen/X86/ret-mmx.ll
> Failed with signal(SIGABRT) at line 1
> while running:  llvm-as <
> /home/buildbot-llvm/1/llvm-ppc/build/test/CodeGen/X86/ret-mmx.ll |   
> llc
> -march=x86-64 -mattr=+mmx
> 0x1125fc78: v2i64,ch,flag = CopyFromReg 0x1125fb68, 0x1125fbf0,
> 0x1125fb68:1llc: LegalizeDAG.cpp:7523:
> void<unnamed>::SelectionDAGLegalize::SplitVectorOp(llvm::SDValue,
> llvm::SDValue&, llvm::SDValue&): Assertion `0 && "Unhandled  
> operation in
> SplitVectorOp!"' failed.
> 0   llc       0x11017c90
> 1   llc       0x110180f8
> 2             0x00100344 __kernel_sigtramp32 + 0
> 3             0xbfd35648 __kernel_sigtramp32 + 3217249028
> 4   libc.so.6 0x0fc0bca0 abort + 608
> 5   libc.so.6 0x0fc00fd8 __assert_fail + 216
> 6   llc       0x10b31368
> 7   llc       0x10b3804c
> 8   llc       0x10b193c0
> 9   llc       0x10b2ba60
> 10  llc       0x10b2fd14
> 11  llc       0x10b1796c
> 12  llc       0x10b4d028
> 13  llc       0x10b4d3a0
> 14  llc       0x10b4d568 llvm::SelectionDAG::Legalize(bool) + 72
> 15  llc       0x10add494 llvm::SelectionDAGISel::CodeGenAndEmitDAG()  
> + 2192
> 16  llc       0x10adfdb8
> llvm::SelectionDAGISel::SelectBasicBlock(llvm::BasicBlock*,
> llvm::ilist_iterator<llvm::Instruction>,
> llvm::ilist_iterator<llvm::Instruction>) + 824
> 17  llc       0x10ae09d4
> llvm::SelectionDAGISel::SelectAllBasicBlocks(llvm::Function&,
> llvm::MachineFunction&, llvm::MachineModuleInfo*, llvm::DwarfWriter*,
> llvm::TargetInstrInfo const&) + 2668
> 18  llc       0x10ae1b74
> llvm::SelectionDAGISel::runOnFunction(llvm::Function&) + 1012
> 19  llc       0x10f55c9c
> llvm::FPPassManager::runOnFunction(llvm::Function&) + 360
> 20  llc       0x10f56c60
> llvm::FunctionPassManagerImpl::run(llvm::Function&) + 164
> 21  llc       0x10f56eac  
> llvm::FunctionPassManager::run(llvm::Function&)
> + 200
> 22  llc       0x103cd0d4 main + 2824
> 23  libc.so.6 0x0fbf1704
> 24  libc.so.6 0x0fbf18c0
>
> The most likely culprit is relying on CPU auto-detection which doesn't
> work when running on PPC. A distant second is some sort of endianess  
> bug.

I can't test it now. Does it work with -mattr=+mmx,+sse2?

Evan

>
>
> Nick
>
> PS. logs url is:
> http://google1.osuosl.org:8011/builders/llvm-ppc-linux/builds/931/steps/test/logs/stdio
>
>>
>> Added:
>>    llvm/trunk/test/CodeGen/X86/ret-mmx.ll
>> Modified:
>>    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>>
>> Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=65152&r1=65151&r2=65152&view=diff
>>
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> =====================================================================
>> --- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
>> +++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Feb 20  
>> 14:43:02 2009
>> @@ -1071,9 +1071,21 @@
>>       CopyVT = MVT::f80;
>>     }
>>
>> -    Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
>> -                               CopyVT, InFlag).getValue(1);
>> -    SDValue Val = Chain.getValue(0);
>> +    SDValue Val;
>> +    if (Is64Bit && CopyVT.isVector() && CopyVT.getSizeInBits() ==  
>> 64) {
>> +      // For x86-64, MMX values are returned in XMM0 and XMM1.  
>> Issue an
>> +      // extract_vector_elt to i64 and then bit_convert it to the  
>> desired type.
>> +      Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
>> +                                 MVT::v2i64, InFlag).getValue(1);
>> +      Val = Chain.getValue(0);
>> +      Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i64,
>> +                        Val, DAG.getConstant(0, MVT::i64));
>> +      Val = DAG.getNode(ISD::BIT_CONVERT, dl, CopyVT, Val);
>> +    } else {
>> +      Chain = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(),
>> +                                 CopyVT, InFlag).getValue(1);
>> +      Val = Chain.getValue(0);
>> +    }
>>     InFlag = Chain.getValue(2);
>>
>>     if (CopyVT != VA.getValVT()) {
>>
>> Added: llvm/trunk/test/CodeGen/X86/ret-mmx.ll
>> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ret-mmx.ll?rev=65152&view=auto
>>
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> = 
>> =====================================================================
>> --- llvm/trunk/test/CodeGen/X86/ret-mmx.ll (added)
>> +++ llvm/trunk/test/CodeGen/X86/ret-mmx.ll Fri Feb 20 14:43:02 2009
>> @@ -0,0 +1,13 @@
>> +; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+mmx
>> +; rdar://6602459
>> +
>> + at g_v1di = external global <1 x i64>
>> +
>> +define void @test_v1di() nounwind {
>> +entry:
>> +	%call = call <1 x i64> @return_v1di()		; <<1 x i64>> [#uses=0]
>> +	store <1 x i64> %call, <1 x i64>* @g_v1di
>> +        ret void
>> +}
>> +
>> +declare <1 x i64> @return_v1di()
>>
>>
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>
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