[llvm-commits] [llvm] r65218 - in /llvm/trunk: lib/CodeGen/TwoAddressInstructionPass.cpp test/CodeGen/X86/twoaddr-delete.ll
Evan Cheng
evan.cheng at apple.com
Fri Feb 20 19:14:25 PST 2009
Author: evancheng
Date: Fri Feb 20 21:14:25 2009
New Revision: 65218
URL: http://llvm.org/viewvc/llvm-project?rev=65218&view=rev
Log:
If two-address def is dead and the instruction does not define other registers, and it doesn't produce side effects, just delete the instruction.
Added:
llvm/trunk/test/CodeGen/X86/twoaddr-delete.ll
Modified:
llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
Modified: llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp?rev=65218&r1=65217&r2=65218&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp (original)
+++ llvm/trunk/lib/CodeGen/TwoAddressInstructionPass.cpp Fri Feb 20 21:14:25 2009
@@ -53,6 +53,7 @@
STATISTIC(NumConvertedTo3Addr, "Number of instructions promoted to 3-address");
STATISTIC(Num3AddrSunk, "Number of 3-address instructions sunk");
STATISTIC(NumReMats, "Number of instructions re-materialized");
+STATISTIC(NumDeletes, "Number of dead instructions deleted");
namespace {
class VISIBILITY_HIDDEN TwoAddressInstructionPass
@@ -371,6 +372,26 @@
return true;
}
+/// isSafeToDelete - If the specified instruction does not produce any side
+/// effects and all of its defs are dead, then it's safe to delete.
+static bool isSafeToDelete(MachineInstr *MI, const TargetInstrInfo *TII) {
+ const TargetInstrDesc &TID = MI->getDesc();
+ if (TID.mayStore() || TID.isCall())
+ return false;
+ if (TID.isTerminator() || TID.hasUnmodeledSideEffects())
+ return false;
+
+ for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
+ MachineOperand &MO = MI->getOperand(i);
+ if (!MO.isReg() || !MO.isDef())
+ continue;
+ if (!MO.isDead())
+ return false;
+ }
+
+ return true;
+}
+
/// runOnMachineFunction - Reduce two-address instructions to two operands.
///
bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
@@ -450,6 +471,15 @@
// allow us to coalesce A and B together, eliminating the copy we are
// about to insert.
if (!mi->killsRegister(regB)) {
+ // If regA is dead and the instruction can be deleted, just delete
+ // it so it doesn't clobber regB.
+ if (mi->getOperand(ti).isDead() && isSafeToDelete(mi, TII)) {
+ mbbi->erase(mi); // Nuke the old inst.
+ mi = nmi;
+ ++NumDeletes;
+ break; // Done with this instruction.
+ }
+
// If this instruction is commutative, check to see if C dies. If
// so, swap the B and C operands. This makes the live ranges of A
// and C joinable.
Added: llvm/trunk/test/CodeGen/X86/twoaddr-delete.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/twoaddr-delete.ll?rev=65218&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/twoaddr-delete.ll (added)
+++ llvm/trunk/test/CodeGen/X86/twoaddr-delete.ll Fri Feb 20 21:14:25 2009
@@ -0,0 +1,43 @@
+; RUN: llvm-as < %s | llc -march=x86 -stats |& grep {twoaddrinstr} | grep {Number of dead instructions deleted}
+
+ %struct.anon = type { [3 x double], double, %struct.node*, [64 x %struct.bnode*], [64 x %struct.bnode*] }
+ %struct.bnode = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode*, %struct.bnode* }
+ %struct.node = type { i16, double, [3 x double], i32, i32 }
+
+define i32 @main(i32 %argc, i8** nocapture %argv) nounwind {
+entry:
+ %0 = malloc %struct.anon ; <%struct.anon*> [#uses=2]
+ %1 = getelementptr %struct.anon* %0, i32 0, i32 2 ; <%struct.node**> [#uses=1]
+ br label %bb14.i
+
+bb14.i: ; preds = %bb14.i, %entry
+ %i8.0.reg2mem.0.i = phi i32 [ 0, %entry ], [ %2, %bb14.i ] ; <i32> [#uses=1]
+ %2 = add i32 %i8.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ %exitcond74.i = icmp eq i32 %2, 32 ; <i1> [#uses=1]
+ br i1 %exitcond74.i, label %bb32.i, label %bb14.i
+
+bb32.i: ; preds = %bb32.i, %bb14.i
+ %tmp.0.reg2mem.0.i = phi i32 [ %indvar.next63.i, %bb32.i ], [ 0, %bb14.i ] ; <i32> [#uses=1]
+ %indvar.next63.i = add i32 %tmp.0.reg2mem.0.i, 1 ; <i32> [#uses=2]
+ %exitcond64.i = icmp eq i32 %indvar.next63.i, 64 ; <i1> [#uses=1]
+ br i1 %exitcond64.i, label %bb47.loopexit.i, label %bb32.i
+
+bb.i.i: ; preds = %bb47.loopexit.i
+ unreachable
+
+stepsystem.exit.i: ; preds = %bb47.loopexit.i
+ store %struct.node* null, %struct.node** %1, align 4
+ br label %bb.i6.i
+
+bb.i6.i: ; preds = %bb.i6.i, %stepsystem.exit.i
+ br i1 false, label %bb107.i.i, label %bb.i6.i
+
+bb107.i.i: ; preds = %bb107.i.i, %bb.i6.i
+ %q_addr.0.i.i.in = phi %struct.bnode** [ null, %bb107.i.i ], [ %3, %bb.i6.i ] ; <%struct.bnode**> [#uses=0]
+ br label %bb107.i.i
+
+bb47.loopexit.i: ; preds = %bb32.i
+ %3 = getelementptr %struct.anon* %0, i32 0, i32 4, i32 0 ; <%struct.bnode**> [#uses=1]
+ %4 = icmp eq %struct.node* null, null ; <i1> [#uses=1]
+ br i1 %4, label %stepsystem.exit.i, label %bb.i.i
+}
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