[llvm-commits] [llvm] r64240 - in /llvm/trunk: lib/Target/X86/X86InstrSSE.td test/CodeGen/X86/maskmovdqu.ll

[Evan Cheng]

Author: evancheng
Date: Tue Feb 10 16:06:28 2009
New Revision: 64240

URL: http://llvm.org/viewvc/llvm-project?rev=64240&view=rev
Log:
Handle llvm.x86.sse2.maskmov.dqu in 64-bit.

Added:
    llvm/trunk/test/CodeGen/X86/maskmovdqu.ll
Modified:
    llvm/trunk/lib/Target/X86/X86InstrSSE.td

Modified: llvm/trunk/lib/Target/X86/X86InstrSSE.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrSSE.td?rev=64240&r1=64239&r2=64240&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrSSE.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrSSE.td Tue Feb 10 16:06:28 2009
@@ -2231,6 +2231,11 @@
                      "maskmovdqu\t{$mask, $src|$src, $mask}",
                      [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, EDI)]>;
 
+let Uses = [RDI] in
+def MASKMOVDQU64 : PDI<0xF7, MRMSrcReg, (outs), (ins VR128:$src, VR128:$mask),
+                     "maskmovdqu\t{$mask, $src|$src, $mask}",
+                     [(int_x86_sse2_maskmov_dqu VR128:$src, VR128:$mask, RDI)]>;
+
 // Non-temporal stores
 def MOVNTPDmr : PDI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
                     "movntpd\t{$src, $dst|$dst, $src}",

Added: llvm/trunk/test/CodeGen/X86/maskmovdqu.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/maskmovdqu.ll?rev=64240&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/maskmovdqu.ll (added)
+++ llvm/trunk/test/CodeGen/X86/maskmovdqu.ll Tue Feb 10 16:06:28 2009
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc -march=x86    -mattr=+sse2 | grep -i EDI
+; RUN: llvm-as < %s | llc -march=x86-64 -mattr=+sse2 | grep -i RDI
+; rdar://6573467
+
+define void @test(<16 x i8> %a, <16 x i8> %b, i32 %dummy, i8* %c) nounwind {
+entry:
+	tail call void @llvm.x86.sse2.maskmov.dqu( <16 x i8> %a, <16 x i8> %b, i8* %c )
+	ret void
+}
+
+declare void @llvm.x86.sse2.maskmov.dqu(<16 x i8>, <16 x i8>, i8*) nounwind