[llvm-commits] [llvm] r64142 - in /llvm/trunk: include/llvm/Instructions.h lib/VMCore/AsmWriter.cpp

Gabor Greif ggreif at gmail.com
Mon Feb 9 07:45:07 PST 2009


Author: ggreif
Date: Mon Feb  9 09:45:06 2009
New Revision: 64142

URL: http://llvm.org/viewvc/llvm-project?rev=64142&view=rev
Log:
make sure that BranchInst::getSuccessor() does not assert in cast<>
even if the underlying operand is NULL. This may happen in debugging context
within opt with partial loop unrolling (see test/Transforms/LoopUnroll/partial.ll).
After this fix I can resubmit the (backed out) r63459:
* lib/VMCore/AsmWriter.cpp: use precise accessors.

Modified:
    llvm/trunk/include/llvm/Instructions.h
    llvm/trunk/lib/VMCore/AsmWriter.cpp

Modified: llvm/trunk/include/llvm/Instructions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Instructions.h?rev=64142&r1=64141&r2=64142&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Instructions.h (original)
+++ llvm/trunk/include/llvm/Instructions.h Mon Feb  9 09:45:06 2009
@@ -2186,7 +2186,9 @@
 
   BasicBlock *getSuccessor(unsigned i) const {
     assert(i < getNumSuccessors() && "Successor # out of range for Branch!");
-    return cast<BasicBlock>(getOperand(i));
+    if (Value *V = getOperand(i))
+      return cast<BasicBlock>(V);
+    return 0;
   }
 
   void setSuccessor(unsigned idx, BasicBlock *NewSucc) {

Modified: llvm/trunk/lib/VMCore/AsmWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/VMCore/AsmWriter.cpp?rev=64142&r1=64141&r2=64142&view=diff

==============================================================================
--- llvm/trunk/lib/VMCore/AsmWriter.cpp (original)
+++ llvm/trunk/lib/VMCore/AsmWriter.cpp Mon Feb  9 09:45:06 2009
@@ -1505,13 +1505,14 @@
   const Value *Operand = I.getNumOperands() ? I.getOperand(0) : 0;
 
   // Special case conditional branches to swizzle the condition out to the front
-  if (isa<BranchInst>(I) && I.getNumOperands() > 1) {
+  if (isa<BranchInst>(I) && cast<BranchInst>(I).isConditional()) {
+    BranchInst &BI(cast<BranchInst>(I));
     Out << ' ';
-    writeOperand(I.getOperand(2), true);
+    writeOperand(BI.getCondition(), true);
     Out << ", ";
-    writeOperand(Operand, true);
+    writeOperand(BI.getSuccessor(0), true);
     Out << ", ";
-    writeOperand(I.getOperand(1), true);
+    writeOperand(BI.getSuccessor(1), true);
 
   } else if (isa<SwitchInst>(I)) {
     // Special case switch statement to get formatting nice and correct...





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