[llvm-commits] [llvm] r63890 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/X86/2009-02-05-CoalescerBug.ll

[Evan Cheng]

Author: evancheng
Date: Thu Feb  5 16:24:17 2009
New Revision: 63890

URL: http://llvm.org/viewvc/llvm-project?rev=63890&view=rev
Log:
isAsCheapAsMove instructions can have register src operands. Check if they are really re-materializable.
This fixes sse.expandfft and sse.stepfft.

Added:
    llvm/trunk/test/CodeGen/X86/2009-02-05-CoalescerBug.ll
Modified:
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=63890&r1=63889&r2=63890&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Thu Feb  5 16:24:17 2009
@@ -558,6 +558,9 @@
   const TargetInstrDesc &TID = DefMI->getDesc();
   if (!TID.isAsCheapAsAMove())
     return false;
+  if (!DefMI->getDesc().isRematerializable() ||
+      !tii_->isTriviallyReMaterializable(DefMI))
+    return false;
   bool SawStore = false;
   if (!DefMI->isSafeToMove(tii_, SawStore))
     return false;

Added: llvm/trunk/test/CodeGen/X86/2009-02-05-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/2009-02-05-CoalescerBug.ll?rev=63890&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/2009-02-05-CoalescerBug.ll (added)
+++ llvm/trunk/test/CodeGen/X86/2009-02-05-CoalescerBug.ll Thu Feb  5 16:24:17 2009
@@ -0,0 +1,12 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movss  | count 2
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep movaps | count 4
+
+define i1 @cfft2_bb12_bb12_2E_ce([2 x float]* %y, [2 x float]* %w, i32, [2 x float]* %x.pn59, i32 %smax190, i32 %j.1180, <4 x float> %wu.2179, <4 x float> %wr.2178, <4 x float>* %tmp89.out, <4 x float>* %tmp107.out, i32* %indvar.next218.out) nounwind {
+newFuncRoot:
+	%tmp82 = insertelement <4 x float> %wr.2178, float 0.000000e+00, i32 0		; <<4 x float>> [#uses=1]
+	%tmp85 = insertelement <4 x float> %tmp82, float 0.000000e+00, i32 1		; <<4 x float>> [#uses=1]
+	%tmp87 = insertelement <4 x float> %tmp85, float 0.000000e+00, i32 2		; <<4 x float>> [#uses=1]
+	%tmp89 = insertelement <4 x float> %tmp87, float 0.000000e+00, i32 3		; <<4 x float>> [#uses=1]
+	store <4 x float> %tmp89, <4 x float>* %tmp89.out
+	ret i1 false
+}