[llvm-commits] [llvm] r63725 - /llvm/trunk/lib/CodeGen/MachineLICM.cpp

[Evan Cheng]

Author: evancheng
Date: Wed Feb  4 01:17:49 2009
New Revision: 63725

URL: http://llvm.org/viewvc/llvm-project?rev=63725&view=rev
Log:
For now, only hoist re-materilizable instructions. LICM will increase register pressure. We want to avoid spilling more instructions if it's possible.

Modified:
    llvm/trunk/lib/CodeGen/MachineLICM.cpp

Modified: llvm/trunk/lib/CodeGen/MachineLICM.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineLICM.cpp?rev=63725&r1=63724&r2=63725&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineLICM.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineLICM.cpp Wed Feb  4 01:17:49 2009
@@ -186,18 +186,27 @@
   if (TID.mayStore() || TID.isCall() || TID.isTerminator() ||
       TID.hasUnmodeledSideEffects())
     return false;
-  
+
+  bool isInvLoad = false;
   if (TID.mayLoad()) {
     // Okay, this instruction does a load. As a refinement, we allow the target
     // to decide whether the loaded value is actually a constant. If so, we can
     // actually use it as a load.
-    if (!TII->isInvariantLoad(&I))
+    isInvLoad = TII->isInvariantLoad(&I);
+    if (!isInvLoad)
       // FIXME: we should be able to sink loads with no other side effects if
       // there is nothing that can change memory from here until the end of
       // block. This is a trivial form of alias analysis.
       return false;
   }
 
+  // FIXME: For now, only hoist re-materilizable instructions. LICM will
+  // increase register pressure. We want to make sure it doesn't increase
+  // spilling.
+  if (!isInvLoad && (!TID.isRematerializable() ||
+                     !TII->isTriviallyReMaterializable(&I)))
+    return false;
+
   DEBUG({
       DOUT << "--- Checking if we can hoist " << I;
       if (I.getDesc().getImplicitUses()) {