[llvm-commits] [llvm] r63509 - /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

[Evan Cheng]

Author: evancheng
Date: Mon Feb  2 03:15:04 2009
New Revision: 63509

URL: http://llvm.org/viewvc/llvm-project?rev=63509&view=rev
Log:
ADD / SUB / SMUL / UMUL with overflow second result top bits must be zero.

Modified:
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=63509&r1=63508&r2=63509&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Feb  2 03:15:04 2009
@@ -7515,6 +7515,14 @@
   KnownZero = KnownOne = APInt(Mask.getBitWidth(), 0);   // Don't know anything.
   switch (Opc) {
   default: break;
+  case X86ISD::ADD:
+  case X86ISD::SUB:
+  case X86ISD::SMUL:
+  case X86ISD::UMUL:
+    // These nodes' second result is a boolean.
+    if (Op.getResNo() == 0)
+      break;
+    // Fallthrough
   case X86ISD::SETCC:
     KnownZero |= APInt::getHighBitsSet(Mask.getBitWidth(),
                                        Mask.getBitWidth() - 1);