[llvm-commits] [llvm] r63236 - in /llvm/trunk: include/llvm/CodeGen/SelectionDAGNodes.h lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Dale Johannesen dalej at apple.com
Wed Jan 28 13:18:29 PST 2009


Author: johannes
Date: Wed Jan 28 15:18:29 2009
New Revision: 63236

URL: http://llvm.org/viewvc/llvm-project?rev=63236&view=rev
Log:
Add DebugLoc-aware constructors for SDNode derived
classes (those that reasonably have a DebugLoc
associated with them).


Modified:
    llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp

Modified: llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h?rev=63236&r1=63235&r2=63236&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SelectionDAGNodes.h Wed Jan 28 15:18:29 2009
@@ -1519,6 +1519,10 @@
     : SDNode(Opc, VTs) {
     InitOperands(&Op, X);
   }
+  UnarySDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, SDValue X)
+    : SDNode(Opc, dl, VTs) {
+    InitOperands(&Op, X);
+  }
 };
 
 /// BinarySDNode - This class is used for two-operand SDNodes.  This is solely
@@ -1530,6 +1534,10 @@
     : SDNode(Opc, VTs) {
     InitOperands(Ops, X, Y);
   }
+  BinarySDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, SDValue X, SDValue Y)
+    : SDNode(Opc, dl, VTs) {
+    InitOperands(Ops, X, Y);
+  }
 };
 
 /// TernarySDNode - This class is used for three-operand SDNodes. This is solely
@@ -1542,6 +1550,11 @@
     : SDNode(Opc, VTs) {
     InitOperands(Ops, X, Y, Z);
   }
+  TernarySDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, SDValue X, SDValue Y,
+                SDValue Z)
+    : SDNode(Opc, dl, VTs) {
+    InitOperands(Ops, X, Y, Z);
+  }
 };
 
 
@@ -1591,6 +1604,14 @@
             MVT MemoryVT, const Value *srcValue, int SVOff,
             unsigned alignment, bool isvolatile);
 
+  MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT MemoryVT,
+            const Value *srcValue, int SVOff,
+            unsigned alignment, bool isvolatile);
+
+  MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, const SDValue *Ops, 
+            unsigned NumOps, MVT MemoryVT, const Value *srcValue, int SVOff,
+            unsigned alignment, bool isvolatile);
+
   /// Returns alignment and volatility of the memory access
   unsigned getAlignment() const { return (1u << (Flags >> 1)) >> 1; }
   bool isVolatile() const { return Flags & 1; }
@@ -1669,6 +1690,21 @@
                 Align, /*isVolatile=*/true) {
     InitOperands(Ops, Chain, Ptr, Val);
   }
+  AtomicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTL, MVT MemVT,
+               SDValue Chain, SDValue Ptr,
+               SDValue Cmp, SDValue Swp, const Value* SrcVal,
+               unsigned Align=0)
+    : MemSDNode(Opc, dl, VTL, MemVT, SrcVal, /*SVOffset=*/0,
+                Align, /*isVolatile=*/true) {
+    InitOperands(Ops, Chain, Ptr, Cmp, Swp);
+  }
+  AtomicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTL, MVT MemVT,
+               SDValue Chain, SDValue Ptr, 
+               SDValue Val, const Value* SrcVal, unsigned Align=0)
+    : MemSDNode(Opc, dl, VTL, MemVT, SrcVal, /*SVOffset=*/0,
+                Align, /*isVolatile=*/true) {
+    InitOperands(Ops, Chain, Ptr, Val);
+  }
   
   const SDValue &getBasePtr() const { return getOperand(1); }
   const SDValue &getVal() const { return getOperand(2); }
@@ -1710,6 +1746,13 @@
     : MemSDNode(Opc, VTs, Ops, NumOps, MemoryVT, srcValue, SVO, Align, Vol),
       ReadMem(ReadMem), WriteMem(WriteMem) {
   }
+  MemIntrinsicSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs,
+                     const SDValue *Ops, unsigned NumOps,
+                     MVT MemoryVT, const Value *srcValue, int SVO,
+                     unsigned Align, bool Vol, bool ReadMem, bool WriteMem)
+    : MemSDNode(Opc, dl, VTs, Ops, NumOps, MemoryVT, srcValue, SVO, Align, Vol),
+      ReadMem(ReadMem), WriteMem(WriteMem) {
+  }
 
   bool readMem() const { return ReadMem; }
   bool writeMem() const { return WriteMem; }
@@ -1928,6 +1971,9 @@
   explicit BasicBlockSDNode(MachineBasicBlock *mbb)
     : SDNode(ISD::BasicBlock, getSDVTList(MVT::Other)), MBB(mbb) {
   }
+  explicit BasicBlockSDNode(MachineBasicBlock *mbb, DebugLoc dl)
+    : SDNode(ISD::BasicBlock, dl, getSDVTList(MVT::Other)), MBB(mbb) {
+  }
 public:
 
   MachineBasicBlock *getBasicBlock() const { return MBB; }
@@ -2037,6 +2083,10 @@
     : SDNode(NodeTy, getSDVTList(MVT::Other)), LabelID(id) {
     InitOperands(&Chain, ch);
   }
+  LabelSDNode(unsigned NodeTy, DebugLoc dl, SDValue ch, unsigned id)
+    : SDNode(NodeTy, dl, getSDVTList(MVT::Other)), LabelID(id) {
+    InitOperands(&Chain, ch);
+  }
 public:
   unsigned getLabelID() const { return LabelID; }
 
@@ -2055,6 +2105,10 @@
     : SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol,
              getSDVTList(VT)), Symbol(Sym) {
   }
+  ExternalSymbolSDNode(bool isTarget, DebugLoc dl, const char *Sym, MVT VT)
+    : SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol, dl,
+             getSDVTList(VT)), Symbol(Sym) {
+  }
 public:
 
   const char *getSymbol() const { return Symbol; }
@@ -2221,6 +2275,12 @@
     : SDNode(ISD::CALL, VTs, Operands, numOperands),
       CallingConv(cc), IsVarArg(isvararg), IsTailCall(istailcall),
       Inreg(isinreg) {}
+  CallSDNode(unsigned cc, DebugLoc dl, bool isvararg, bool istailcall, 
+             bool isinreg, SDVTList VTs, const SDValue *Operands, 
+             unsigned numOperands)
+    : SDNode(ISD::CALL, dl, VTs, Operands, numOperands),
+      CallingConv(cc), IsVarArg(isvararg), IsTailCall(istailcall),
+      Inreg(isinreg) {}
 public:
   unsigned getCallingConv() const { return CallingConv; }
   unsigned isVarArg() const { return IsVarArg; }
@@ -2295,6 +2355,16 @@
     assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) &&
            "Only indexed loads and stores have a non-undef offset operand");
   }
+  LSBaseSDNode(ISD::NodeType NodeTy, DebugLoc dl, SDValue *Operands, 
+               unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM, 
+               MVT VT, const Value *SV, int SVO, unsigned Align, bool Vol)
+    : MemSDNode(NodeTy, dl, VTs, VT, SV, SVO, Align, Vol) {
+    SubclassData = AM;
+    InitOperands(Ops, Operands, numOperands);
+    assert(Align != 0 && "Loads and stores should have non-zero aligment");
+    assert((getOffset().getOpcode() == ISD::UNDEF || isIndexed()) &&
+           "Only indexed loads and stores have a non-undef offset operand");
+  }
 
   const SDValue &getOffset() const {
     return getOperand(getOpcode() == ISD::LOAD ? 2 : 3);
@@ -2331,6 +2401,13 @@
                    VTs, AM, LVT, SV, O, Align, Vol) {
     SubclassData |= (unsigned short)ETy << 3;
   }
+  LoadSDNode(SDValue *ChainPtrOff, DebugLoc dl, SDVTList VTs,
+             ISD::MemIndexedMode AM, ISD::LoadExtType ETy, MVT LVT,
+             const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
+    : LSBaseSDNode(ISD::LOAD, dl, ChainPtrOff, 3,
+                   VTs, AM, LVT, SV, O, Align, Vol) {
+    SubclassData |= (unsigned short)ETy << 3;
+  }
 public:
 
   /// getExtensionType - Return whether this is a plain node,
@@ -2360,6 +2437,13 @@
                    VTs, AM, SVT, SV, O, Align, Vol) {
     SubclassData |= (unsigned short)isTrunc << 3;
   }
+  StoreSDNode(SDValue *ChainValuePtrOff, DebugLoc dl, SDVTList VTs,
+              ISD::MemIndexedMode AM, bool isTrunc, MVT SVT,
+              const Value *SV, int O=0, unsigned Align=0, bool Vol=false)
+    : LSBaseSDNode(ISD::STORE, dl, ChainValuePtrOff, 4,
+                   VTs, AM, SVT, SV, O, Align, Vol) {
+    SubclassData |= (unsigned short)isTrunc << 3;
+  }
 public:
 
   /// isTruncatingStore - Return true if the op does a truncation before store.

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=63236&r1=63235&r2=63236&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Wed Jan 28 15:18:29 2009
@@ -4766,6 +4766,29 @@
   assert(isVolatile() == vol && "Volatile representation error!");
 }
 
+MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, MVT memvt,
+                     const Value *srcValue, int SVO,
+                     unsigned alignment, bool vol)
+ : SDNode(Opc, dl, VTs), MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
+   Flags(encodeMemSDNodeFlags(vol, alignment)) {
+
+  assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
+  assert(getAlignment() == alignment && "Alignment representation error!");
+  assert(isVolatile() == vol && "Volatile representation error!");
+}
+
+MemSDNode::MemSDNode(unsigned Opc, DebugLoc dl, SDVTList VTs, 
+                     const SDValue *Ops,
+                     unsigned NumOps, MVT memvt, const Value *srcValue,
+                     int SVO, unsigned alignment, bool vol)
+   : SDNode(Opc, dl, VTs, Ops, NumOps),
+     MemoryVT(memvt), SrcValue(srcValue), SVOffset(SVO),
+     Flags(vol | ((Log2_32(alignment) + 1) << 1)) {
+  assert(isPowerOf2_32(alignment) && "Alignment is not a power of 2!");
+  assert(getAlignment() == alignment && "Alignment representation error!");
+  assert(isVolatile() == vol && "Volatile representation error!");
+}
+
 /// getMemOperand - Return a MachineMemOperand object describing the memory
 /// reference performed by this memory reference.
 MachineMemOperand MemSDNode::getMemOperand() const {





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