[llvm-commits] [llvm] r62519 - in /llvm/trunk: lib/Target/X86/X86ISelDAGToDAG.cpp test/CodeGen/X86/rem-2.ll

[Evan Cheng]

Author: evancheng
Date: Mon Jan 19 13:06:11 2009
New Revision: 62519

URL: http://llvm.org/viewvc/llvm-project?rev=62519&view=rev
Log:
DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.

Added:
    llvm/trunk/test/CodeGen/X86/rem-2.ll
Modified:
    llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp

Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=62519&r1=62518&r2=62519&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Mon Jan 19 13:06:11 2009
@@ -1405,7 +1405,7 @@
         InFlag =
           CurDAG->getCopyToReg(CurDAG->getEntryNode(),
                                LoReg, N0, SDValue()).getValue(1);
-        if (isSigned) {
+        if (isSigned && !CurDAG->SignBitIsZero(N0)) {
           // Sign extend the low part into the high part.
           InFlag =
             SDValue(CurDAG->getTargetNode(SExtOpcode, MVT::Flag, InFlag), 0);

Added: llvm/trunk/test/CodeGen/X86/rem-2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/rem-2.ll?rev=62519&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/rem-2.ll (added)
+++ llvm/trunk/test/CodeGen/X86/rem-2.ll Mon Jan 19 13:06:11 2009
@@ -0,0 +1,7 @@
+; RUN: llvm-as < %s | llc -march=x86 | not grep cltd
+
+define i32 @test(i32 %X) nounwind readnone {
+entry:
+	%0 = srem i32 41, %X
+	ret i32 %0
+}