[llvm-commits] [llvm] r62383 - in /llvm/trunk: lib/CodeGen/SelectionDAG/DAGCombiner.cpp test/CodeGen/X86/scalar-extract.ll
Mon P Wang
wangmp at apple.com
Fri Jan 16 16:07:25 PST 2009
Author: wangmp
Date: Fri Jan 16 18:07:25 2009
New Revision: 62383
URL: http://llvm.org/viewvc/llvm-project?rev=62383&view=rev
Log:
Simplify extract element of a scalar to vector.
Added:
llvm/trunk/test/CodeGen/X86/scalar-extract.ll
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=62383&r1=62382&r2=62383&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Fri Jan 16 18:07:25 2009
@@ -4878,16 +4878,24 @@
}
SDValue DAGCombiner::visitEXTRACT_VECTOR_ELT(SDNode *N) {
- // (vextract (v4f32 load $addr), c) -> (f32 load $addr+c*size)
- // (vextract (v4f32 s2v (f32 load $addr)), c) -> (f32 load $addr+c*size)
- // (vextract (v4f32 shuffle (load $addr), <1,u,u,u>), 0) -> (f32 load $addr)
+ // (vextract (scalar_to_vector val, 0) -> val
+ SDValue InVec = N->getOperand(0);
+ SDValue EltNo = N->getOperand(1);
+
+ if (isa<ConstantSDNode>(EltNo)) {
+ unsigned Elt = cast<ConstantSDNode>(EltNo)->getZExtValue();
+ if (InVec.getOpcode() == ISD::SCALAR_TO_VECTOR && Elt == 0) {
+ return InVec.getOperand(0);
+ }
+ }
// Perform only after legalization to ensure build_vector / vector_shuffle
// optimizations have already been done.
if (!LegalOperations) return SDValue();
- SDValue InVec = N->getOperand(0);
- SDValue EltNo = N->getOperand(1);
+ // (vextract (v4f32 load $addr), c) -> (f32 load $addr+c*size)
+ // (vextract (v4f32 s2v (f32 load $addr)), c) -> (f32 load $addr+c*size)
+ // (vextract (v4f32 shuffle (load $addr), <1,u,u,u>), 0) -> (f32 load $addr)
if (isa<ConstantSDNode>(EltNo)) {
unsigned Elt = cast<ConstantSDNode>(EltNo)->getZExtValue();
Added: llvm/trunk/test/CodeGen/X86/scalar-extract.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/scalar-extract.ll?rev=62383&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/scalar-extract.ll (added)
+++ llvm/trunk/test/CodeGen/X86/scalar-extract.ll Fri Jan 16 18:07:25 2009
@@ -0,0 +1,13 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+mmx -o %t -f
+; RUN: not grep movq %t
+
+; Check that widening doesn't introduce a mmx register in this case when
+; a simple load/store would suffice.
+
+define void @foo(<2 x i16>* %A, <2 x i16>* %B) {
+entry:
+ %tmp1 = load <2 x i16>* %A ; <<2 x i16>> [#uses=1]
+ store <2 x i16> %tmp1, <2 x i16>* %B
+ ret void
+}
+
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