[llvm-commits] [llvm] r62338 - in /llvm/trunk: lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/ret-addr.ll
Bill Wendling
isanbard at gmail.com
Fri Jan 16 11:25:27 PST 2009
Author: void
Date: Fri Jan 16 13:25:27 2009
New Revision: 62338
URL: http://llvm.org/viewvc/llvm-project?rev=62338&view=rev
Log:
Add support for non-zero __builtin_return_address values on X86.
Added:
llvm/trunk/test/CodeGen/X86/ret-addr.ll
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=62338&r1=62337&r2=62338&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Fri Jan 16 13:25:27 2009
@@ -1466,7 +1466,7 @@
PseudoSourceValue::getStack(), LocMemOffset);
}
-/// EmitTailCallLoadRetAddr - Emit a load of return adress if tail call
+/// EmitTailCallLoadRetAddr - Emit a load of return address if tail call
/// optimization is performed and it is required.
SDValue
X86TargetLowering::EmitTailCallLoadRetAddr(SelectionDAG &DAG,
@@ -1480,8 +1480,9 @@
// Adjust the Return address stack slot.
MVT VT = getPointerTy();
OutRetAddr = getReturnAddressFrameIndex(DAG);
+
// Load the "old" Return address.
- OutRetAddr = DAG.getLoad(VT, Chain,OutRetAddr, NULL, 0);
+ OutRetAddr = DAG.getLoad(VT, Chain, OutRetAddr, NULL, 0);
return SDValue(OutRetAddr.getNode(), 1);
}
@@ -1949,10 +1950,10 @@
MachineFunction &MF = DAG.getMachineFunction();
X86MachineFunctionInfo *FuncInfo = MF.getInfo<X86MachineFunctionInfo>();
int ReturnAddrIndex = FuncInfo->getRAIndex();
- uint64_t SlotSize = TD->getPointerSize();
if (ReturnAddrIndex == 0) {
// Set up a frame object for the return address.
+ uint64_t SlotSize = TD->getPointerSize();
ReturnAddrIndex = MF.getFrameInfo()->CreateFixedObject(SlotSize, -SlotSize);
FuncInfo->setRAIndex(ReturnAddrIndex);
}
@@ -5891,11 +5892,19 @@
}
SDValue X86TargetLowering::LowerRETURNADDR(SDValue Op, SelectionDAG &DAG) {
- // Depths > 0 not supported yet!
- if (cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue() > 0)
- return SDValue();
-
- // Just load the return address
+ unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue();
+
+ if (Depth > 0) {
+ SDValue FrameAddr = LowerFRAMEADDR(Op, DAG);
+ SDValue Offset =
+ DAG.getConstant(TD->getPointerSize(),
+ Subtarget->is64Bit() ? MVT::i64 : MVT::i32);
+ return DAG.getLoad(getPointerTy(), DAG.getEntryNode(),
+ DAG.getNode(ISD::ADD, getPointerTy(), FrameAddr, Offset),
+ NULL, 0);
+ }
+
+ // Just load the return address.
SDValue RetAddrFI = getReturnAddressFrameIndex(DAG);
return DAG.getLoad(getPointerTy(), DAG.getEntryNode(), RetAddrFI, NULL, 0);
}
Added: llvm/trunk/test/CodeGen/X86/ret-addr.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/ret-addr.ll?rev=62338&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/ret-addr.ll (added)
+++ llvm/trunk/test/CodeGen/X86/ret-addr.ll Fri Jan 16 13:25:27 2009
@@ -0,0 +1,22 @@
+; RUN: llvm-as < %s | llc -disable-fp-elim -march=x86 | not grep xor
+; RUN: llvm-as < %s | llc -disable-fp-elim -march=x86-64 | not grep xor
+
+define i8* @h() nounwind readnone optsize {
+entry:
+ %0 = tail call i8* @llvm.returnaddress(i32 2) ; <i8*> [#uses=1]
+ ret i8* %0
+}
+
+declare i8* @llvm.returnaddress(i32) nounwind readnone
+
+define i8* @g() nounwind readnone optsize {
+entry:
+ %0 = tail call i8* @llvm.returnaddress(i32 1) ; <i8*> [#uses=1]
+ ret i8* %0
+}
+
+define i8* @f() nounwind readnone optsize {
+entry:
+ %0 = tail call i8* @llvm.returnaddress(i32 0) ; <i8*> [#uses=1]
+ ret i8* %0
+}
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