[llvm-commits] [llvm] r62262 - in /llvm/trunk/lib/CodeGen/SelectionDAG: LegalizeDAG.cpp SelectionDAG.cpp SelectionDAGBuild.cpp SelectionDAGISel.cpp

Dan Gohman gohman at apple.com
Thu Jan 15 08:58:18 PST 2009


Author: djg
Date: Thu Jan 15 10:58:17 2009
New Revision: 62262

URL: http://llvm.org/viewvc/llvm-project?rev=62262&view=rev
Log:
More consts on TargetLowering references.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=62262&r1=62261&r2=62262&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Thu Jan 15 10:58:17 2009
@@ -736,7 +736,7 @@
 /// ExpandUnalignedLoad - Expands an unaligned load to 2 half-size loads.
 static
 SDValue ExpandUnalignedLoad(LoadSDNode *LD, SelectionDAG &DAG,
-                            TargetLowering &TLI) {
+                            const TargetLowering &TLI) {
   int SVOffset = LD->getSrcValueOffset();
   SDValue Chain = LD->getChain();
   SDValue Ptr = LD->getBasePtr();

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp?rev=62262&r1=62261&r2=62262&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAG.cpp Thu Jan 15 10:58:17 2009
@@ -4982,7 +4982,7 @@
       return "<<Unknown Machine Node>>";
     }
     if (G) {
-      TargetLowering &TLI = G->getTargetLoweringInfo();
+      const TargetLowering &TLI = G->getTargetLoweringInfo();
       const char *Name = TLI.getTargetNodeName(getOpcode());
       if (Name) return Name;
       return "<<Unknown Target Node>>";

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=62262&r1=62261&r2=62262&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Thu Jan 15 10:58:17 2009
@@ -380,7 +380,7 @@
                                   MVT ValueVT,
                                   ISD::NodeType AssertOp = ISD::DELETED_NODE) {
   assert(NumParts > 0 && "No parts to assemble!");
-  TargetLowering &TLI = DAG.getTargetLoweringInfo();
+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
   SDValue Val = Parts[0];
 
   if (NumParts > 1) {
@@ -525,7 +525,7 @@
 static void getCopyToParts(SelectionDAG &DAG, SDValue Val,
                            SDValue *Parts, unsigned NumParts, MVT PartVT,
                            ISD::NodeType ExtendKind = ISD::ANY_EXTEND) {
-  TargetLowering &TLI = DAG.getTargetLoweringInfo();
+  const TargetLowering &TLI = DAG.getTargetLoweringInfo();
   MVT PtrVT = TLI.getPointerTy();
   MVT ValueVT = Val.getValueType();
   unsigned PartBits = PartVT.getSizeInBits();
@@ -648,8 +648,7 @@
   // Handle a multi-element vector.
   MVT IntermediateVT, RegisterVT;
   unsigned NumIntermediates;
-  unsigned NumRegs =
-    DAG.getTargetLoweringInfo()
+  unsigned NumRegs = TLI
       .getVectorTypeBreakdown(ValueVT, IntermediateVT, NumIntermediates,
                               RegisterVT);
   unsigned NumElements = ValueVT.getVectorNumElements();
@@ -4819,7 +4818,7 @@
 /// processed uses a memory 'm' constraint.
 static bool
 hasInlineAsmMemConstraint(std::vector<InlineAsm::ConstraintInfo> &CInfos,
-                          TargetLowering &TLI) {
+                          const TargetLowering &TLI) {
   for (unsigned i = 0, e = CInfos.size(); i != e; ++i) {
     InlineAsm::ConstraintInfo &CI = CInfos[i];
     for (unsigned j = 0, ee = CI.Codes.size(); j != ee; ++j) {

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=62262&r1=62261&r2=62262&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Thu Jan 15 10:58:17 2009
@@ -141,8 +141,8 @@
                                       const TargetMachine *TM,
                                       MachineBasicBlock *BB,
                                       bool Fast) {
-    TargetLowering &TLI = IS->getTargetLowering();
-    
+    const TargetLowering &TLI = IS->getTargetLowering();
+
     if (Fast)
       return createFastDAGScheduler(IS, DAG, TM, BB, Fast);
     if (TLI.getSchedulingPreference() == TargetLowering::SchedulingForLatency)
@@ -399,7 +399,7 @@
 /// CheckDAGForTailCallsAndFixThem - This Function looks for CALL nodes in the
 /// DAG and fixes their tailcall attribute operand.
 static void CheckDAGForTailCallsAndFixThem(SelectionDAG &DAG, 
-                                           TargetLowering& TLI) {
+                                           const TargetLowering& TLI) {
   SDNode * Ret = NULL;
   SDValue Terminator = DAG.getRoot();
 





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