[llvm-commits] [llvm] r61707 - in /llvm/trunk/lib: CodeGen/SelectionDAG/SelectionDAGBuild.cpp CodeGen/SimpleRegisterCoalescing.cpp Target/DarwinTargetAsmInfo.cpp Target/ELFTargetAsmInfo.cpp Target/TargetAsmInfo.cpp Target/X86/X86ISelLowering.cpp Target/X86/X86TargetAsmInfo.cpp

[Devang Patel]

Author: dpatel
Date: Mon Jan  5 11:31:22 2009
New Revision: 61707

URL: http://llvm.org/viewvc/llvm-project?rev=61707&view=rev
Log:

squash warnings.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
    llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp
    llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp
    llvm/trunk/lib/Target/TargetAsmInfo.cpp
    llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
    llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp?rev=61707&r1=61706&r2=61707&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp Mon Jan  5 11:31:22 2009
@@ -2019,6 +2019,7 @@
   size_t numCmps = Clusterify(Cases, SI);
   DEBUG(errs() << "Clusterify finished. Total clusters: " << Cases.size()
                << ". Total compares: " << numCmps << '\n');
+  numCmps = 0;
 
   // Get the Value to be switched on and default basic blocks, which will be
   // inserted into CaseBlock records, representing basic blocks in the binary

Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=61707&r1=61706&r2=61707&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Mon Jan  5 11:31:22 2009
@@ -1662,7 +1662,7 @@
   // optimize for it: if there is more than one value, we merge them all into
   // the lowest numbered one, then handle the interval as if we were merging
   // with one value number.
-  VNInfo *LHSValNo;
+  VNInfo *LHSValNo = NULL;
   if (EliminatedLHSVals.size() > 1) {
     // Loop through all the equal value numbers merging them into the smallest
     // one.

Modified: llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp?rev=61707&r1=61706&r2=61707&view=diff

==============================================================================
--- llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/DarwinTargetAsmInfo.cpp Mon Jan  5 11:31:22 2009
@@ -108,6 +108,7 @@
   }
 
   // FIXME: Do we have any extra special weird cases?
+  return NULL;
 }
 
 const Section*

Modified: llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp?rev=61707&r1=61706&r2=61707&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/ELFTargetAsmInfo.cpp Mon Jan  5 11:31:22 2009
@@ -86,6 +86,8 @@
     }
   } else
     assert(0 && "Unsupported global");
+
+  return NULL;
 }
 
 const Section*

Modified: llvm/trunk/lib/Target/TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetAsmInfo.cpp?rev=61707&r1=61706&r2=61707&view=diff

==============================================================================
--- llvm/trunk/lib/Target/TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/TargetAsmInfo.cpp Mon Jan  5 11:31:22 2009
@@ -342,6 +342,7 @@
    default:
     assert(0 && "Unknown section kind");
   }
+  return NULL;
 }
 
 const Section*

Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=61707&r1=61706&r2=61707&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Mon Jan  5 11:31:22 2009
@@ -1255,7 +1255,7 @@
     
     if (VA.isRegLoc()) {
       MVT RegVT = VA.getLocVT();
-      TargetRegisterClass *RC;
+      TargetRegisterClass *RC = NULL;
       if (RegVT == MVT::i32)
         RC = X86::GR32RegisterClass;
       else if (Is64Bit && RegVT == MVT::i64)

Modified: llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp?rev=61707&r1=61706&r2=61707&view=diff

==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetAsmInfo.cpp Mon Jan  5 11:31:22 2009
@@ -319,6 +319,7 @@
    default:
     assert(0 && "Unknown section kind");
   }
+  return NULL;
 }
 
 std::string X86COFFTargetAsmInfo::printSectionFlags(unsigned flags) const {