[llvm-commits] X86 vector shift patch

[Mon Ping Wang]

Hi Eli,

Thanks for your patch!  The two patches does roughly the same thing  
though yours tries to go through vector shuffles and bit converts  
while doesn't (though it allows non constant undefs).  It clearly make  
sense to support those vector shuffle and bit convert. The patch could  
be easily updated to support those cases plus a few you note below as  
the shift amount has not been lowered to something else. Legalize is  
the more logical home to do the transformation since it is converting  
the IR to legal operations.  I should do a few more experiments to see  
how the shift amount might be transformed.

-- Mon Ping

On Dec 20, 2008, at 6:58 PM, Eli Friedman wrote:

> On Sat, Dec 20, 2008 at 6:22 PM, Mon Ping Wang <monping at apple.com>  
> wrote:
>> Hi,
>>
>> This is a patch that allows us to generate X86 vector shifts  
>> (psllq, psrlq
>> etc..) for some vector shifts (v2i64, v4i32, and v8i16)  where the  
>> shift
>> amount is the same for all elements.  This particular patch does as  
>> a target
>> specific  combine pass because it is easier to identify the shift  
>> amounts
>> before it gets lowered to something else (e.g., build vector of  
>> constants
>> can be translated into a load from a constant pool).  If someone  
>> has a
>> better idea of where it should be done or have any other comments,  
>> please
>> let me know.
>
> It isn't impossible to do it during legalize... I've had a patch in my
> tree for a while that's reasonably successful at doing that.  I'm
> attaching my patch, in case it's useful; it does still miss some cases
> because isSplatVector isn't clever enough, though.  That patch also
> has some suggestions for potentially interesting cases we can handle
> in somewhat unconventional ways.
>
> Does you patch handle a shift by a splat shuffle, e.g. shl(x,
> shufflevector(y, y, <0,0,0,0>))?  Or does the lowering take care of
> this case somehow?
>
> -Eli
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