[llvm-commits] [llvm] r61218 - /llvm/trunk/lib/CodeGen/LowerSubregs.cpp

Dan Gohman gohman at apple.com
Thu Dec 18 14:11:36 PST 2008


Author: djg
Date: Thu Dec 18 16:11:34 2008
New Revision: 61218

URL: http://llvm.org/viewvc/llvm-project?rev=61218&view=rev
Log:
Make LowerSubregs' debug output for EXTRACT_SUBREG consistent with
that of INSERT_SUBREG and SUBREG_TO_REG.

Modified:
    llvm/trunk/lib/CodeGen/LowerSubregs.cpp

Modified: llvm/trunk/lib/CodeGen/LowerSubregs.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LowerSubregs.cpp?rev=61218&r1=61217&r2=61218&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LowerSubregs.cpp (original)
+++ llvm/trunk/lib/CodeGen/LowerSubregs.cpp Thu Dec 18 16:11:34 2008
@@ -80,7 +80,11 @@
          
   DOUT << "subreg: CONVERTING: " << *MI;
 
-  if (SrcReg != DstReg) {
+  if (SrcReg == DstReg) {
+    // No need to insert an identify copy instruction.
+    DOUT << "subreg: eliminated!";
+  } else {
+    // Insert copy
     const TargetRegisterClass *TRC = TRI.getPhysicalRegisterRegClass(DstReg);
     assert(TRC == TRI.getPhysicalRegisterRegClass(SrcReg) &&
             "Extract subreg and Dst must be of same register class");
@@ -177,6 +181,7 @@
     const TargetRegisterClass *TRC0= TRI.getPhysicalRegisterRegClass(DstSubReg);
     const TargetRegisterClass *TRC1= TRI.getPhysicalRegisterRegClass(InsReg);
     TII.copyRegToReg(*MBB, MI, DstSubReg, InsReg, TRC0, TRC1);
+
 #ifndef NDEBUG
     MachineBasicBlock::iterator dMI = MI;
     DOUT << "subreg: " << *(--dMI);





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