[llvm-commits] [llvm] r61129 - /llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

[Mon P Wang]

Author: wangmp
Date: Wed Dec 17 02:49:47 2008
New Revision: 61129

URL: http://llvm.org/viewvc/llvm-project?rev=61129&view=rev
Log:
Fix expansion of vsetcc to set the high bit for true instead of 1.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp?rev=61129&r1=61128&r2=61129&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp Wed Dec 17 02:49:47 2008
@@ -3144,10 +3144,12 @@
         SDValue In1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, TmpEltVT,
                                   Tmp1, DAG.getIntPtrConstant(i));
         Ops[i] = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(In1), In1,
-                              DAG.getNode(ISD::EXTRACT_VECTOR_ELT, TmpEltVT,
-                                          Tmp2, DAG.getIntPtrConstant(i)),
-                              CC);
-        Ops[i] = DAG.getNode(ISD::SIGN_EXTEND, EltVT, Ops[i]);
+                             DAG.getNode(ISD::EXTRACT_VECTOR_ELT, TmpEltVT,
+                                         Tmp2, DAG.getIntPtrConstant(i)),
+                             CC);
+        Ops[i] = DAG.getNode(ISD::SELECT, EltVT, Ops[i],
+                             DAG.getConstant(EltVT.getIntegerVTBitMask(),EltVT),
+                             DAG.getConstant(0, EltVT));
       }
       Result = DAG.getNode(ISD::BUILD_VECTOR, VT, &Ops[0], NumElems);
       break;