[llvm-commits] [llvm] r61050 - in /llvm/trunk: lib/CodeGen/SelectionDAG/LegalizeTypes.h lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp test/CodeGen/X86/vshift_scalar.ll test/CodeGen/X86/vshift_split2.ll

[Mon P Wang]

Author: wangmp
Date: Mon Dec 15 15:44:00 2008
New Revision: 61050

URL: http://llvm.org/viewvc/llvm-project?rev=61050&view=rev
Log:
Added support for splitting and scalarizing vector shifts.

Added:
    llvm/trunk/test/CodeGen/X86/vshift_scalar.ll
    llvm/trunk/test/CodeGen/X86/vshift_split2.ll
Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h?rev=61050&r1=61049&r2=61050&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeTypes.h Mon Dec 15 15:44:00 2008
@@ -496,6 +496,7 @@
   // Vector Result Scalarization: <1 x ty> -> ty.
   void ScalarizeVectorResult(SDNode *N, unsigned OpNo);
   SDValue ScalarizeVecRes_BinOp(SDNode *N);
+  SDValue ScalarizeVecRes_ShiftOp(SDNode *N);
   SDValue ScalarizeVecRes_UnaryOp(SDNode *N);
 
   SDValue ScalarizeVecRes_BIT_CONVERT(SDNode *N);

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp?rev=61050&r1=61049&r2=61050&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp Mon Dec 15 15:44:00 2008
@@ -91,6 +91,10 @@
   case ISD::UDIV:
   case ISD::UREM:
   case ISD::XOR:  R = ScalarizeVecRes_BinOp(N); break;
+
+  case ISD::SHL:
+  case ISD::SRA:
+  case ISD::SRL: R = ScalarizeVecRes_ShiftOp(N); break;
   }
 
   // If R is null, the sub-method took care of registering the result.
@@ -104,6 +108,17 @@
   return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, RHS);
 }
 
+SDValue DAGTypeLegalizer::ScalarizeVecRes_ShiftOp(SDNode *N) {
+  SDValue LHS = GetScalarizedVector(N->getOperand(0));
+  SDValue ShiftAmt = GetScalarizedVector(N->getOperand(1));
+  if (TLI.getShiftAmountTy().bitsLT(ShiftAmt.getValueType()))
+    ShiftAmt = DAG.getNode(ISD::TRUNCATE, TLI.getShiftAmountTy(), ShiftAmt);
+  else if (TLI.getShiftAmountTy().bitsGT(ShiftAmt.getValueType()))
+    ShiftAmt = DAG.getNode(ISD::ANY_EXTEND, TLI.getShiftAmountTy(), ShiftAmt);
+
+  return DAG.getNode(N->getOpcode(), LHS.getValueType(), LHS, ShiftAmt);
+}
+
 SDValue DAGTypeLegalizer::ScalarizeVecRes_BIT_CONVERT(SDNode *N) {
   MVT NewVT = N->getValueType(0).getVectorElementType();
   return DAG.getNode(ISD::BIT_CONVERT, NewVT, N->getOperand(0));
@@ -392,6 +407,9 @@
   case ISD::AND:
   case ISD::OR:
   case ISD::XOR:
+  case ISD::SHL:
+  case ISD::SRA:
+  case ISD::SRL: 
   case ISD::UREM:
   case ISD::SREM:
   case ISD::FREM: SplitVecRes_BinOp(N, Lo, Hi); break;

Added: llvm/trunk/test/CodeGen/X86/vshift_scalar.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vshift_scalar.ll?rev=61050&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/vshift_scalar.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vshift_scalar.ll Mon Dec 15 15:44:00 2008
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc
+
+; Legalization test that requires scalarizing a vector.
+
+define void @update(<1 x i32> %val, <1 x i32>* %dst) nounwind {
+entry:
+	%shl = shl <1 x i32> %val, < i32 2>
+	%shr = ashr <1 x i32> %val, < i32 4>
+	store <1 x i32> %shr, <1 x i32>* %dst
+	ret void
+}

Added: llvm/trunk/test/CodeGen/X86/vshift_split2.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vshift_split2.ll?rev=61050&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/X86/vshift_split2.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vshift_split2.ll Mon Dec 15 15:44:00 2008
@@ -0,0 +1,11 @@
+; RUN: llvm-as < %s | llc
+
+; Legalization example that requires splitting a large vector into smaller pieces.
+
+define void @update(<8 x i32> %val, <8 x i32>* %dst) nounwind {
+entry:
+	%shl = shl <8 x i32> %val, < i32 2, i32 2, i32 2, i32 2, i32 4, i32 4, i32 4, i32 4 >
+	%shr = ashr <8 x i32> %val, < i32 2, i32 2, i32 2, i32 2, i32 4, i32 4, i32 4, i32 4 >
+	store <8 x i32> %shr, <8 x i32>* %dst
+	ret void
+}