[llvm-commits] [llvm] r60586 - in /llvm/trunk: include/llvm/CodeGen/MachineInstr.h lib/CodeGen/LiveIntervalAnalysis.cpp lib/CodeGen/MachineInstr.cpp lib/CodeGen/PostRASchedulerList.cpp lib/CodeGen/RegAllocLocal.cpp

Dan Gohman gohman at apple.com
Thu Dec 4 21:45:43 PST 2008


Author: djg
Date: Thu Dec  4 23:45:42 2008
New Revision: 60586

URL: http://llvm.org/viewvc/llvm-project?rev=60586&view=rev
Log:
Drop the reg argument to isRegReDefinedByTwoAddr, which was redundant.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineInstr.h
    llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
    llvm/trunk/lib/CodeGen/MachineInstr.cpp
    llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
    llvm/trunk/lib/CodeGen/RegAllocLocal.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineInstr.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineInstr.h?rev=60586&r1=60585&r2=60586&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineInstr.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineInstr.h Thu Dec  4 23:45:42 2008
@@ -219,9 +219,9 @@
   /// none is found.
   int findFirstPredOperandIdx() const;
   
-  /// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
+  /// isRegReDefinedByTwoAddr - Given the index of a register def operand,
   /// check if the register def is a re-definition due to two addr elimination.
-  bool isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const;
+  bool isRegReDefinedByTwoAddr(unsigned DefIdx) const;
 
   /// copyKillDeadInfo - Copies kill / dead operand properties from MI.
   ///

Modified: llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp?rev=60586&r1=60585&r2=60586&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp (original)
+++ llvm/trunk/lib/CodeGen/LiveIntervalAnalysis.cpp Thu Dec  4 23:45:42 2008
@@ -426,7 +426,7 @@
     // must be due to phi elimination or two addr elimination.  If this is
     // the result of two address elimination, then the vreg is one of the
     // def-and-use register operand.
-    if (mi->isRegReDefinedByTwoAddr(interval.reg, MOIdx)) {
+    if (mi->isRegReDefinedByTwoAddr(MOIdx)) {
       // If this is a two-address definition, then we have already processed
       // the live range.  The only problem is that we didn't realize there
       // are actually two values in the live interval.  Because of this we

Modified: llvm/trunk/lib/CodeGen/MachineInstr.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineInstr.cpp?rev=60586&r1=60585&r2=60586&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineInstr.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineInstr.cpp Thu Dec  4 23:45:42 2008
@@ -646,13 +646,14 @@
   return -1;
 }
   
-/// isRegReDefinedByTwoAddr - Given the defined register and the operand index,
+/// isRegReDefinedByTwoAddr - Given the index of a register def operand,
 /// check if the register def is a re-definition due to two addr elimination.
-bool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const{
+bool MachineInstr::isRegReDefinedByTwoAddr(unsigned DefIdx) const{
+  assert(getOperand(DefIdx).isDef() && "DefIdx is not a def!");
   const TargetInstrDesc &TID = getDesc();
   for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) {
     const MachineOperand &MO = getOperand(i);
-    if (MO.isReg() && MO.isUse() && MO.getReg() == Reg &&
+    if (MO.isReg() && MO.isUse() &&
         TID.getOperandConstraint(i, TOI::TIED_TO) == (int)DefIdx)
       return true;
   }

Modified: llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp?rev=60586&r1=60585&r2=60586&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp (original)
+++ llvm/trunk/lib/CodeGen/PostRASchedulerList.cpp Thu Dec  4 23:45:42 2008
@@ -478,7 +478,7 @@
       if (Reg == 0) continue;
       if (!MO.isDef()) continue;
       // Ignore two-addr defs.
-      if (MI->isRegReDefinedByTwoAddr(Reg, i)) continue;
+      if (MI->isRegReDefinedByTwoAddr(i)) continue;
 
       DefIndices[Reg] = Count;
       KillIndices[Reg] = -1;

Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=60586&r1=60585&r2=60586&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Thu Dec  4 23:45:42 2008
@@ -609,7 +609,7 @@
           // Check if this is a two address instruction.  If so, then
           // the def does not kill the use.
           if (last->second.first == I &&
-              I->isRegReDefinedByTwoAddr(MO.getReg(), i))
+              I->isRegReDefinedByTwoAddr(i))
             continue;
           
           MachineOperand& lastUD =





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