[llvm-commits] Multiple directories in a single library
Matthijs Kooijman
matthijs at stdin.nl
Mon Nov 24 05:45:25 PST 2008
Hi all,
while working on my own backend, I found that things got really messy real
quickly, partly caused by the fact that all .cpp files must be in the same
directory (lib/Target/TargetName). Simply putting code in different
directories and using DIRS in the Makefile doesn't cut it, since that produces
different libraries for each directory, which don't get linked in by the
programs that need them.
There is some code in llvm-config which fixes the library problem for the
TargetNameAsmPrinter library, but that isn't really the clean way IMHO. Is
this also meant for cleanup, or is there another reason why the AsmPrinter
should be in a seperate library?
Anyway, I thought it would be good if one could simply compile .cpp files in
subdirectories as if they are in the current directory, without a makefile in
the subdirectory. These cpp files would end up in the library as defined by
the parent directory's Makefile.
I've attached a small patch which facilitates this. It allows you to define
the EXTRA_SOURCES variable to explicitely add extra source files (one could
also explicitly define SOURCES, but this way you don't loose the default
all-sources-in-the-current-dir feature). For example, I would add:
EXTRA_SOURCES = $(wildcard $(PROJ_SRC_DIR)/SubDir/*.cpp)
to get all the cpp files in SubDir compiled as well.
It would be more elegant to specify EXTRA_DIRS instead (or perhaps a better
name) as a list of directories, and let Makefile.rules handle the wildcarding
here. However, I've not found a way to write
.for DIR in $(EXTRA_DIRS)
SOURCES += $(patsubst $(PROJ_SRC_DIR)/%, %, wildcard $(PROJ_SRC_DIR)/$DIR/*.cpp))
.endfor
in the Makefile (the above appears to be valid in NetBSD make, any suggestions
on how to do this in GNU make?) Doing this in shell seems tricky, because then
the wildcarding must be done in shell as well AFAICS.
The second change in the patch makes sure that the proper directory is created
below $(ObjDir). This is a bit ugly, now it depends on $(ObjDir)/%/../.dir,
which becomes $(ObjDir)/SubDir/foo/../.dir for foo.cpp in SubDir, which
ensures that $(ObjDir)/SubDir is properly created. I tried to do this propely
by depending on $(ObjDir)/$(dir %)/.dir but that didn't work for reasons
beyond my Makefile-fu. Any suggestions on this are welcome.
Gr.
Matthijs
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Index: Makefile.rules
===================================================================
--- Makefile.rules (revision 59957)
+++ Makefile.rules (working copy)
@@ -541,6 +541,10 @@
Sources := $(SOURCES)
endif
+ifdef EXTRA_SOURCES
+ Sources += $(patsubst $(PROJ_SRC_DIR)/%, %, $(EXTRA_SOURCES))
+endif
+
ifdef BUILT_SOURCES
Sources += $(filter %.cpp %.c %.cc %.y %.l,$(BUILT_SOURCES))
endif
@@ -1122,17 +1126,17 @@
DEPEND_MOVEFILE = then $(MV) -f "$(ObjDir)/$*.d.tmp" "$(ObjDir)/$*.d"; \
else $(RM) "$(ObjDir)/$*.d.tmp"; exit 1; fi
-$(ObjDir)/%.lo $(ObjDir)/%.o: %.cpp $(ObjDir)/.dir $(BUILT_SOURCES)
+$(ObjDir)/%.lo $(ObjDir)/%.o: %.cpp $(ObjDir)/%/../.dir $(BUILT_SOURCES)
$(Echo) "Compiling $*.cpp for $(BuildMode) build " $(PIC_FLAG)
$(Verb) if $(MAYBE_PIC_Compile.CXX) $(DEPEND_OPTIONS) $< -o $(ObjDir)/$*.o ; \
$(DEPEND_MOVEFILE)
-$(ObjDir)/%.lo $(ObjDir)/%.o: %.cc $(ObjDir)/.dir $(BUILT_SOURCES)
+$(ObjDir)/%.lo $(ObjDir)/%.o: %.cc $(ObjDir)/%/../.dir $(BUILT_SOURCES)
$(Echo) "Compiling $*.cc for $(BuildMode) build" $(PIC_FLAG)
$(Verb) if $(MAYBE_PIC_Compile.CXX) $(DEPEND_OPTIONS) $< -o $(ObjDir)/$*.o ; \
$(DEPEND_MOVEFILE)
-$(ObjDir)/%.lo $(ObjDir)/%.o: %.c $(ObjDir)/.dir $(BUILT_SOURCES)
+$(ObjDir)/%.lo $(ObjDir)/%.o: %.c $(ObjDir)/%/../.dir $(BUILT_SOURCES)
$(Echo) "Compiling $*.c for $(BuildMode) build" $(PIC_FLAG)
$(Verb) if $(MAYBE_PIC_Compile.C) $(DEPEND_OPTIONS) $< -o $(ObjDir)/$*.o ; \
$(DEPEND_MOVEFILE)
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