[llvm-commits] [llvm] r59551 - in /llvm/trunk/lib/Target/X86: X86Instr64bit.td X86InstrInfo.td
Dan Gohman
gohman at apple.com
Tue Nov 18 13:29:15 PST 2008
Author: djg
Date: Tue Nov 18 15:29:14 2008
New Revision: 59551
URL: http://llvm.org/viewvc/llvm-project?rev=59551&view=rev
Log:
Don't set neverHasSideEffects on x86's divide instructions, since
they trap on divide-by-zero, and this side effect is otherwise
unmodeled.
Modified:
llvm/trunk/lib/Target/X86/X86Instr64bit.td
llvm/trunk/lib/Target/X86/X86InstrInfo.td
Modified: llvm/trunk/lib/Target/X86/X86Instr64bit.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Instr64bit.td?rev=59551&r1=59550&r2=59551&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Instr64bit.td (original)
+++ llvm/trunk/lib/Target/X86/X86Instr64bit.td Tue Nov 18 15:29:14 2008
@@ -474,7 +474,6 @@
} // Defs = [EFLAGS]
// Unsigned division / remainder
-let neverHasSideEffects = 1 in {
let Defs = [RAX,RDX,EFLAGS], Uses = [RAX,RDX] in {
def DIV64r : RI<0xF7, MRM6r, (outs), (ins GR64:$src), // RDX:RAX/r64 = RAX,RDX
"div{q}\t$src", []>;
@@ -488,7 +487,6 @@
"idiv{q}\t$src", []>;
}
}
-}
// Unary instructions
let Defs = [EFLAGS], CodeSize = 2 in {
Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=59551&r1=59550&r2=59551&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Nov 18 15:29:14 2008
@@ -747,6 +747,7 @@
def IMUL32m : I<0xF7, MRM5m, (outs), (ins i32mem:$src),
"imul{l}\t$src", []>; // EAX,EDX = EAX*[mem32]
}
+} // neverHasSideEffects
// unsigned division/remainder
let Defs = [AL,AH,EFLAGS], Uses = [AX] in
@@ -791,7 +792,6 @@
def IDIV32m: I<0xF7, MRM7m, (outs), (ins i32mem:$src), // EDX:EAX/[mem32] = EAX,EDX
"idiv{l}\t$src", []>;
}
-} // neverHasSideEffects
//===----------------------------------------------------------------------===//
// Two address Instructions.
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