[llvm-commits] [llvm] r59296 - in /llvm/trunk: include/llvm/Intrinsics.td include/llvm/IntrinsicsXCore.td lib/Target/XCore/XCoreISelLowering.cpp lib/Target/XCore/XCoreInstrInfo.td test/CodeGen/XCore/bitrev.ll test/CodeGen/XCore/getid.ll

[Richard Osborne]

Author: friedgold
Date: Fri Nov 14 04:12:16 2008
New Revision: 59296

URL: http://llvm.org/viewvc/llvm-project?rev=59296&view=rev
Log:
Add XCore intrinsics for getid (returns thread id) and bitrev (reverses
bits in a word).

Added:
    llvm/trunk/include/llvm/IntrinsicsXCore.td
    llvm/trunk/test/CodeGen/XCore/bitrev.ll
    llvm/trunk/test/CodeGen/XCore/getid.ll
Modified:
    llvm/trunk/include/llvm/Intrinsics.td
    llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
    llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td

Modified: llvm/trunk/include/llvm/Intrinsics.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Intrinsics.td?rev=59296&r1=59295&r2=59296&view=diff

==============================================================================
--- llvm/trunk/include/llvm/Intrinsics.td (original)
+++ llvm/trunk/include/llvm/Intrinsics.td Fri Nov 14 04:12:16 2008
@@ -411,3 +411,4 @@
 include "llvm/IntrinsicsARM.td"
 include "llvm/IntrinsicsCellSPU.td"
 include "llvm/IntrinsicsAlpha.td"
+include "llvm/IntrinsicsXCore.td"

Added: llvm/trunk/include/llvm/IntrinsicsXCore.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IntrinsicsXCore.td?rev=59296&view=auto

==============================================================================
--- llvm/trunk/include/llvm/IntrinsicsXCore.td (added)
+++ llvm/trunk/include/llvm/IntrinsicsXCore.td Fri Nov 14 04:12:16 2008
@@ -0,0 +1,14 @@
+//==- IntrinsicsXCore.td - XCore intrinsics                 -*- tablegen -*-==//
+// 
+// Copyright (C) 2008 XMOS
+//
+//===----------------------------------------------------------------------===//
+//
+// This file defines all of the XCore-specific intrinsics.
+//
+//===----------------------------------------------------------------------===//
+
+let TargetPrefix = "xcore" in {  // All intrinsics start with "llvm.xcore.".
+  def int_xcore_bitrev : Intrinsic<[llvm_i32_ty],[llvm_i32_ty],[IntrNoMem]>;
+  def int_xcore_getid : Intrinsic<[llvm_i32_ty],[],[IntrNoMem]>;
+}

Modified: llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp?rev=59296&r1=59295&r2=59296&view=diff

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/XCore/XCoreISelLowering.cpp Fri Nov 14 04:12:16 2008
@@ -226,9 +226,8 @@
 }
 
 static inline SDValue BuildGetId(SelectionDAG &DAG) {
-  // TODO
-  assert(0 && "Unimplemented");
-  return SDValue();
+  return DAG.getNode(ISD::INTRINSIC_WO_CHAIN, MVT::i32,
+                     DAG.getConstant(Intrinsic::xcore_getid, MVT::i32));
 }
 
 static inline bool isZeroLengthArray(const Type *Ty) {

Modified: llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td?rev=59296&r1=59295&r2=59296&view=diff

==============================================================================
--- llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td (original)
+++ llvm/trunk/lib/Target/XCore/XCoreInstrInfo.td Fri Nov 14 04:12:16 2008
@@ -750,7 +750,7 @@
 // getd, testlcl, tinitlr, getps, setps
 def BITREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
                  "bitrev $dst, $src",
-                 []>;
+                 [(set GRRegs:$dst, (int_xcore_bitrev GRRegs:$src))]>;
 
 def BYTEREV_l2r : _FL2R<(outs GRRegs:$dst), (ins GRRegs:$src),
                  "byterev $dst, $src",
@@ -790,7 +790,7 @@
 let Defs = [R11] in
 def GETID_0R : _F0R<(outs), (ins),
                  "get r11, id",
-                 []>;
+                 [(set R11, (int_xcore_getid))]>;
 
 //===----------------------------------------------------------------------===//
 // Non-Instruction Patterns

Added: llvm/trunk/test/CodeGen/XCore/bitrev.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/bitrev.ll?rev=59296&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/XCore/bitrev.ll (added)
+++ llvm/trunk/test/CodeGen/XCore/bitrev.ll Fri Nov 14 04:12:16 2008
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llc -march=xcore > %t1.s
+; RUN: grep bitrev %t1.s | count 1 
+declare i32 @llvm.xcore.bitrev(i32)
+
+define i32 @test(i32 %val) {
+	%result = call i32 @llvm.xcore.bitrev(i32 %val)
+	ret i32 %result
+}

Added: llvm/trunk/test/CodeGen/XCore/getid.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/XCore/getid.ll?rev=59296&view=auto

==============================================================================
--- llvm/trunk/test/CodeGen/XCore/getid.ll (added)
+++ llvm/trunk/test/CodeGen/XCore/getid.ll Fri Nov 14 04:12:16 2008
@@ -0,0 +1,8 @@
+; RUN: llvm-as < %s | llc -march=xcore > %t1.s
+; RUN: grep "get r11, id" %t1.s | count 1 
+declare i32 @llvm.xcore.getid()
+
+define i32 @test() {
+	%result = call i32 @llvm.xcore.getid()
+	ret i32 %result
+}