[llvm-commits] [llvm] r59055 - in /llvm/trunk: include/llvm/CodeGen/LinkAllCodegenComponents.h include/llvm/CodeGen/ScheduleDAG.h include/llvm/CodeGen/SchedulerRegistry.h lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Dan Gohman
gohman at apple.com
Tue Nov 11 09:50:47 PST 2008
Author: djg
Date: Tue Nov 11 11:50:47 2008
New Revision: 59055
URL: http://llvm.org/viewvc/llvm-project?rev=59055&view=rev
Log:
Change the scheduler accessor methods to accept an explicit TargetMachine
argument instead of taking the SelectionDAG's TargetMachine. This is
needed for some upcoming scheduler changes.
Modified:
llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h
llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Modified: llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h?rev=59055&r1=59054&r2=59055&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h (original)
+++ llvm/trunk/include/llvm/CodeGen/LinkAllCodegenComponents.h Tue Nov 11 11:50:47 2008
@@ -42,11 +42,11 @@
llvm::linkOcamlGC();
llvm::linkShadowStackGC();
- (void) llvm::createBURRListDAGScheduler(NULL, NULL, NULL, false);
- (void) llvm::createTDRRListDAGScheduler(NULL, NULL, NULL, false);
- (void) llvm::createTDListDAGScheduler(NULL, NULL, NULL, false);
- (void) llvm::createFastDAGScheduler(NULL, NULL, NULL, false);
- (void) llvm::createDefaultScheduler(NULL, NULL, NULL, false);
+ (void) llvm::createBURRListDAGScheduler(NULL, NULL, NULL, NULL, false);
+ (void) llvm::createTDRRListDAGScheduler(NULL, NULL, NULL, NULL, false);
+ (void) llvm::createTDListDAGScheduler(NULL, NULL, NULL, NULL, false);
+ (void) llvm::createFastDAGScheduler(NULL, NULL, NULL, NULL, false);
+ (void) llvm::createDefaultScheduler(NULL, NULL, NULL, NULL, false);
}
} ForceCodegenLinking; // Force link by creating a global definition.
Modified: llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h?rev=59055&r1=59054&r2=59055&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h (original)
+++ llvm/trunk/include/llvm/CodeGen/ScheduleDAG.h Tue Nov 11 11:50:47 2008
@@ -395,6 +395,7 @@
/// reduction list scheduler.
ScheduleDAG* createBURRListDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB,
bool Fast);
@@ -402,6 +403,7 @@
/// reduction list scheduler.
ScheduleDAG* createTDRRListDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB,
bool Fast);
@@ -409,6 +411,7 @@
/// a hazard recognizer.
ScheduleDAG* createTDListDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB,
bool Fast);
@@ -416,6 +419,7 @@
///
ScheduleDAG *createFastDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB,
bool Fast);
@@ -423,6 +427,7 @@
/// for the target.
ScheduleDAG* createDefaultScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB,
bool Fast);
Modified: llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h?rev=59055&r1=59054&r2=59055&view=diff
==============================================================================
--- llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h (original)
+++ llvm/trunk/include/llvm/CodeGen/SchedulerRegistry.h Tue Nov 11 11:50:47 2008
@@ -35,6 +35,7 @@
public:
typedef ScheduleDAG *(*FunctionPassCtor)(SelectionDAGISel*, SelectionDAG*,
+ const TargetMachine *,
MachineBasicBlock*, bool);
static MachinePassRegistry Registry;
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp?rev=59055&r1=59054&r2=59055&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp Tue Nov 11 11:50:47 2008
@@ -652,6 +652,7 @@
llvm::ScheduleDAG* llvm::createFastDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB, bool) {
- return new ScheduleDAGFast(*DAG, BB, DAG->getTarget());
+ return new ScheduleDAGFast(*DAG, BB, *TM);
}
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp?rev=59055&r1=59054&r2=59055&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Tue Nov 11 11:50:47 2008
@@ -541,8 +541,9 @@
/// recognizer and deletes it when done.
ScheduleDAG* llvm::createTDListDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB, bool Fast) {
- return new ScheduleDAGList(*DAG, BB, DAG->getTarget(),
+ return new ScheduleDAGList(*DAG, BB, *TM,
new LatencyPriorityQueue(),
IS->CreateTargetHazardRecognizer());
}
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=59055&r1=59054&r2=59055&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Tue Nov 11 11:50:47 2008
@@ -1881,27 +1881,29 @@
llvm::ScheduleDAG* llvm::createBURRListDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB,
bool Fast) {
if (Fast)
- return new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(), true, true,
+ return new ScheduleDAGRRList(*DAG, BB, *TM, true, true,
new BURegReductionFastPriorityQueue());
- const TargetInstrInfo *TII = DAG->getTarget().getInstrInfo();
- const TargetRegisterInfo *TRI = DAG->getTarget().getRegisterInfo();
+ const TargetInstrInfo *TII = TM->getInstrInfo();
+ const TargetRegisterInfo *TRI = TM->getRegisterInfo();
BURegReductionPriorityQueue *PQ = new BURegReductionPriorityQueue(TII, TRI);
ScheduleDAGRRList *SD =
- new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(),true,false, PQ);
+ new ScheduleDAGRRList(*DAG, BB, *TM, true, false, PQ);
PQ->setScheduleDAG(SD);
return SD;
}
llvm::ScheduleDAG* llvm::createTDRRListDAGScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB,
bool Fast) {
- return new ScheduleDAGRRList(*DAG, BB, DAG->getTarget(), false, Fast,
+ return new ScheduleDAGRRList(*DAG, BB, *TM, false, Fast,
new TDRegReductionPriorityQueue());
}
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=59055&r1=59054&r2=59055&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Nov 11 11:50:47 2008
@@ -133,16 +133,17 @@
/// for the target.
ScheduleDAG* createDefaultScheduler(SelectionDAGISel *IS,
SelectionDAG *DAG,
+ const TargetMachine *TM,
MachineBasicBlock *BB,
bool Fast) {
TargetLowering &TLI = IS->getTargetLowering();
if (TLI.getSchedulingPreference() == TargetLowering::SchedulingForLatency) {
- return createTDListDAGScheduler(IS, DAG, BB, Fast);
+ return createTDListDAGScheduler(IS, DAG, TM, BB, Fast);
} else {
assert(TLI.getSchedulingPreference() ==
TargetLowering::SchedulingForRegPressure && "Unknown sched type!");
- return createBURRListDAGScheduler(IS, DAG, BB, Fast);
+ return createBURRListDAGScheduler(IS, DAG, TM, BB, Fast);
}
}
}
@@ -1053,7 +1054,8 @@
RegisterScheduler::setDefault(Ctor);
}
- ScheduleDAG *Scheduler = Ctor(this, CurDAG, BB, Fast);
+ TargetMachine &TM = getTargetLowering().getTargetMachine();
+ ScheduleDAG *Scheduler = Ctor(this, CurDAG, &TM, BB, Fast);
Scheduler->Run();
return Scheduler;
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