[llvm-commits] [llvm] r57844 - in /llvm/trunk: include/llvm/CodeGen/MachineRegisterInfo.h lib/CodeGen/MachineRegisterInfo.cpp

[Evan Cheng]

Author: evancheng
Date: Mon Oct 20 15:03:28 2008
New Revision: 57844

URL: http://llvm.org/viewvc/llvm-project?rev=57844&view=rev
Log:
Add a register class -> virtual registers map.

Modified:
    llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
    llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp

Modified: llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h?rev=57844&r1=57843&r2=57844&view=diff

==============================================================================
--- llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h (original)
+++ llvm/trunk/include/llvm/CodeGen/MachineRegisterInfo.h Mon Oct 20 15:03:28 2008
@@ -32,6 +32,11 @@
   /// Each element in this list contains the register class of the vreg and the
   /// start of the use/def list for the register.
   std::vector<std::pair<const TargetRegisterClass*, MachineOperand*> > VRegInfo;
+
+  /// RegClassVRegMap - This vector acts as a map from TargetRegisterClass to
+  /// virtual registers. For each target register class, it keeps a list of
+  /// virtual registers belonging to the class.
+  std::vector<std::vector<unsigned> > RegClass2VRegMap;
   
   /// PhysRegUseDefLists - This is an array of the head of the use/def list for
   /// physical registers.
@@ -130,6 +135,7 @@
   //===--------------------------------------------------------------------===//
   
   /// getRegClass - Return the register class of the specified virtual register.
+  ///
   const TargetRegisterClass *getRegClass(unsigned Reg) const {
     Reg -= TargetRegisterInfo::FirstVirtualRegister;
     assert(Reg < VRegInfo.size() && "Invalid vreg!");
@@ -137,10 +143,22 @@
   }
 
   /// setRegClass - Set the register class of the specified virtual register.
+  ///
   void setRegClass(unsigned Reg, const TargetRegisterClass *RC) {
+    unsigned VR = Reg;
     Reg -= TargetRegisterInfo::FirstVirtualRegister;
     assert(Reg < VRegInfo.size() && "Invalid vreg!");
+    const TargetRegisterClass *OldRC = VRegInfo[Reg].first;
     VRegInfo[Reg].first = RC;
+
+    // Remove from old register class's vregs list. This may be slow but
+    // fortunately this operation is rarely needed.
+    std::vector<unsigned> &VRegs = RegClass2VRegMap[OldRC->getID()];
+    std::vector<unsigned>::iterator I=std::find(VRegs.begin(), VRegs.end(), VR);
+    VRegs.erase(I);
+
+    // Add to new register class's vregs list.
+    RegClass2VRegMap[RC->getID()].push_back(VR);
   }
   
   /// createVirtualRegister - Create and return a new virtual register in the
@@ -151,13 +169,13 @@
     // Add a reg, but keep track of whether the vector reallocated or not.
     void *ArrayBase = VRegInfo.empty() ? 0 : &VRegInfo[0];
     VRegInfo.push_back(std::make_pair(RegClass, (MachineOperand*)0));
-    
-    if (&VRegInfo[0] == ArrayBase || VRegInfo.size() == 1)
-      return getLastVirtReg();
 
-    // Otherwise, the vector reallocated, handle this now.
-    HandleVRegListReallocation();
-    return getLastVirtReg();
+    if (!((&VRegInfo[0] == ArrayBase || VRegInfo.size() == 1)))
+      // The vector reallocated, handle this now.
+      HandleVRegListReallocation();
+    unsigned VR = getLastVirtReg();
+    RegClass2VRegMap[RegClass->getID()].push_back(VR);
+    return VR;
   }
 
   /// getLastVirtReg - Return the highest currently assigned virtual register.
@@ -165,7 +183,12 @@
   unsigned getLastVirtReg() const {
     return (unsigned)VRegInfo.size()+TargetRegisterInfo::FirstVirtualRegister-1;
   }
-  
+
+  /// getRegClassVirtRegs - Return the list of virtual registers of the given
+  /// target register class.
+  std::vector<unsigned> &getRegClassVirtRegs(const TargetRegisterClass *RC) {
+    return RegClass2VRegMap[RC->getID()];
+  }
   
   //===--------------------------------------------------------------------===//
   // Physical Register Use Info

Modified: llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp?rev=57844&r1=57843&r2=57844&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp (original)
+++ llvm/trunk/lib/CodeGen/MachineRegisterInfo.cpp Mon Oct 20 15:03:28 2008
@@ -16,6 +16,7 @@
 
 MachineRegisterInfo::MachineRegisterInfo(const TargetRegisterInfo &TRI) {
   VRegInfo.reserve(256);
+  RegClass2VRegMap.resize(TRI.getNumRegClasses()+1); // RC ID starts at 1.
   UsedPhysRegs.resize(TRI.getNumRegs());
   
   // Create the physreg use/def lists.