[llvm-commits] [llvm] r57521 - in /llvm/trunk: lib/CodeGen/ lib/CodeGen/SelectionDAG/ lib/Support/ lib/Target/ lib/Target/ARM/ lib/Target/Alpha/ lib/Target/CBackend/ lib/Target/CellSPU/ lib/Target/CppBackend/ lib/Target/IA64/ lib/Target/MSIL/ lib/Target/Mips/ lib/Target/PIC16/ lib/Target/PowerPC/ lib/Target/Sparc/ lib/Target/X86/ tools/llc/
Dan Gohman
gohman at apple.com
Tue Oct 14 13:25:08 PDT 2008
Author: djg
Date: Tue Oct 14 15:25:08 2008
New Revision: 57521
URL: http://llvm.org/viewvc/llvm-project?rev=57521&view=rev
Log:
Fix command-line option printing to print two spaces where needed,
instead of requiring all "short description" strings to begin with
two spaces. This makes these strings less mysterious, and it fixes
some cases where short description strings mistakenly did not
begin with two spaces.
Modified:
llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp
llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
llvm/trunk/lib/CodeGen/RegAllocSimple.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
llvm/trunk/lib/CodeGen/VirtRegMap.cpp
llvm/trunk/lib/Support/CommandLine.cpp
llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp
llvm/trunk/lib/Target/CBackend/CBackend.cpp
llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp
llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp
llvm/trunk/lib/Target/MSIL/MSILWriter.cpp
llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp
llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
llvm/trunk/lib/Target/TargetMachine.cpp
llvm/trunk/lib/Target/X86/X86Subtarget.cpp
llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
llvm/trunk/tools/llc/llc.cpp
Modified: llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocBigBlock.cpp Tue Oct 14 15:25:08 2008
@@ -53,7 +53,7 @@
STATISTIC(NumFolded, "Number of loads/stores folded into instructions");
static RegisterRegAlloc
- bigBlockRegAlloc("bigblock", " Big-block register allocator",
+ bigBlockRegAlloc("bigblock", "Big-block register allocator",
createBigBlockRegisterAllocator);
namespace {
Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Tue Oct 14 15:25:08 2008
@@ -50,7 +50,7 @@
cl::init(false), cl::Hidden);
static RegisterRegAlloc
-linearscanRegAlloc("linearscan", " linear scan register allocator",
+linearscanRegAlloc("linearscan", "linear scan register allocator",
createLinearScanRegisterAllocator);
namespace {
Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Tue Oct 14 15:25:08 2008
@@ -37,7 +37,7 @@
STATISTIC(NumLoads , "Number of loads added");
static RegisterRegAlloc
- localRegAlloc("local", " local register allocator",
+ localRegAlloc("local", "local register allocator",
createLocalRegisterAllocator);
namespace {
Modified: llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocPBQP.cpp Tue Oct 14 15:25:08 2008
@@ -60,7 +60,7 @@
using namespace llvm;
static RegisterRegAlloc
-registerPBQPRepAlloc("pbqp", " PBQP register allocator",
+registerPBQPRepAlloc("pbqp", "PBQP register allocator",
createPBQPRegisterAllocator);
Modified: llvm/trunk/lib/CodeGen/RegAllocSimple.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocSimple.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocSimple.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocSimple.cpp Tue Oct 14 15:25:08 2008
@@ -35,7 +35,7 @@
namespace {
static RegisterRegAlloc
- simpleRegAlloc("simple", " simple register allocator",
+ simpleRegAlloc("simple", "simple register allocator",
createSimpleRegisterAllocator);
class VISIBILITY_HIDDEN RegAllocSimple : public MachineFunctionPass {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp Tue Oct 14 15:25:08 2008
@@ -31,7 +31,7 @@
STATISTIC(NumCCCopies, "Number of cross class copies");
static RegisterScheduler
- fastDAGScheduler("fast", " Fast suboptimal list scheduling",
+ fastDAGScheduler("fast", "Fast suboptimal list scheduling",
createFastDAGScheduler);
namespace {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp Tue Oct 14 15:25:08 2008
@@ -37,7 +37,7 @@
STATISTIC(NumStalls, "Number of pipeline stalls");
static RegisterScheduler
- tdListDAGScheduler("list-td", " Top-down list scheduler",
+ tdListDAGScheduler("list-td", "Top-down list scheduler",
createTDListDAGScheduler);
namespace {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp Tue Oct 14 15:25:08 2008
@@ -41,11 +41,11 @@
static RegisterScheduler
burrListDAGScheduler("list-burr",
- " Bottom-up register reduction list scheduling",
+ "Bottom-up register reduction list scheduling",
createBURRListDAGScheduler);
static RegisterScheduler
tdrListrDAGScheduler("list-tdrr",
- " Top-down register reduction list scheduling",
+ "Top-down register reduction list scheduling",
createTDRRListDAGScheduler);
namespace {
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp Tue Oct 14 15:25:08 2008
@@ -119,7 +119,7 @@
" allocation):"));
static RegisterScheduler
-defaultListDAGScheduler("default", " Best scheduler for the target",
+defaultListDAGScheduler("default", "Best scheduler for the target",
createDefaultScheduler);
namespace llvm {
Modified: llvm/trunk/lib/CodeGen/VirtRegMap.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/VirtRegMap.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/VirtRegMap.cpp (original)
+++ llvm/trunk/lib/CodeGen/VirtRegMap.cpp Tue Oct 14 15:25:08 2008
@@ -56,8 +56,8 @@
SpillerOpt("spiller",
cl::desc("Spiller to use: (default: local)"),
cl::Prefix,
- cl::values(clEnumVal(simple, " simple spiller"),
- clEnumVal(local, " local spiller"),
+ cl::values(clEnumVal(simple, "simple spiller"),
+ clEnumVal(local, "local spiller"),
clEnumValEnd),
cl::init(local));
Modified: llvm/trunk/lib/Support/CommandLine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Support/CommandLine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Support/CommandLine.cpp (original)
+++ llvm/trunk/lib/Support/CommandLine.cpp Tue Oct 14 15:25:08 2008
@@ -953,7 +953,7 @@
for (unsigned i = 0, e = getNumOptions(); i != e; ++i) {
size_t NumSpaces = GlobalWidth-strlen(getOption(i))-8;
cout << " =" << getOption(i) << std::string(NumSpaces, ' ')
- << " - " << getDescription(i) << "\n";
+ << " - " << getDescription(i) << "\n";
}
} else {
if (O.HelpStr[0])
Modified: llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/ARM/ARMTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -29,8 +29,8 @@
cl::desc("Disable if-conversion pass"));
// Register the target.
-static RegisterTarget<ARMTargetMachine> X("arm", " ARM");
-static RegisterTarget<ThumbTargetMachine> Y("thumb", " Thumb");
+static RegisterTarget<ARMTargetMachine> X("arm", "ARM");
+static RegisterTarget<ThumbTargetMachine> Y("thumb", "Thumb");
// No assembler printer by default
ARMTargetMachine::AsmPrinterCtorFn ARMTargetMachine::AsmPrinterCtor = 0;
Modified: llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Alpha/AlphaTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -22,7 +22,7 @@
using namespace llvm;
// Register the targets
-static RegisterTarget<AlphaTargetMachine> X("alpha", " Alpha (incomplete)");
+static RegisterTarget<AlphaTargetMachine> X("alpha", "Alpha (incomplete)");
const TargetAsmInfo *AlphaTargetMachine::createTargetAsmInfo() const {
return new AlphaTargetAsmInfo(*this);
Modified: llvm/trunk/lib/Target/CBackend/CBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CBackend/CBackend.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CBackend/CBackend.cpp (original)
+++ llvm/trunk/lib/Target/CBackend/CBackend.cpp Tue Oct 14 15:25:08 2008
@@ -49,7 +49,7 @@
using namespace llvm;
// Register the target.
-static RegisterTarget<CTargetMachine> X("c", " C backend");
+static RegisterTarget<CTargetMachine> X("c", "C backend");
namespace {
/// CBackendNameAllUsedStructsAndMergeFunctions - This pass inserts names for
Modified: llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/CellSPU/SPUTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -24,7 +24,7 @@
namespace {
// Register the targets
RegisterTarget<SPUTargetMachine>
- CELLSPU("cellspu", " STI CBEA Cell SPU");
+ CELLSPU("cellspu", "STI CBEA Cell SPU");
}
const std::pair<unsigned, int> *
Modified: llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp (original)
+++ llvm/trunk/lib/Target/CppBackend/CPPBackend.cpp Tue Oct 14 15:25:08 2008
@@ -72,7 +72,7 @@
cl::init("!bad!"));
// Register the target.
-static RegisterTarget<CPPTargetMachine> X("cpp", " C++ backend");
+static RegisterTarget<CPPTargetMachine> X("cpp", "C++ backend");
namespace {
typedef std::vector<const Type*> TypeList;
Modified: llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/IA64/IA64TargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -26,7 +26,7 @@
extern "C" int IA64TargetMachineModule;
int IA64TargetMachineModule = 0;
-static RegisterTarget<IA64TargetMachine> X("ia64", " IA-64 (Itanium)");
+static RegisterTarget<IA64TargetMachine> X("ia64", "IA-64 (Itanium)");
const TargetAsmInfo *IA64TargetMachine::createTargetAsmInfo() const {
return new IA64TargetAsmInfo(*this);
Modified: llvm/trunk/lib/Target/MSIL/MSILWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/MSIL/MSILWriter.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/MSIL/MSILWriter.cpp (original)
+++ llvm/trunk/lib/Target/MSIL/MSILWriter.cpp Tue Oct 14 15:25:08 2008
@@ -45,7 +45,7 @@
}
-static RegisterTarget<MSILTarget> X("msil", " MSIL backend");
+static RegisterTarget<MSILTarget> X("msil", "MSIL backend");
bool MSILModule::runOnModule(Module &M) {
ModulePtr = &M;
Modified: llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Mips/MipsTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -20,8 +20,8 @@
using namespace llvm;
// Register the target.
-static RegisterTarget<MipsTargetMachine> X("mips", " Mips");
-static RegisterTarget<MipselTargetMachine> Y("mipsel", " Mipsel");
+static RegisterTarget<MipsTargetMachine> X("mips", "Mips");
+static RegisterTarget<MipselTargetMachine> Y("mipsel", "Mipsel");
const TargetAsmInfo *MipsTargetMachine::
createTargetAsmInfo() const
Modified: llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PIC16/PIC16TargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -23,7 +23,7 @@
namespace {
// Register the targets
- RegisterTarget<PIC16TargetMachine> X("pic16", " PIC16 14-bit");
+ RegisterTarget<PIC16TargetMachine> X("pic16", "PIC16 14-bit");
}
PIC16TargetMachine::
Modified: llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/PPCTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -23,9 +23,9 @@
// Register the targets
static RegisterTarget<PPC32TargetMachine>
-X("ppc32", " PowerPC 32");
+X("ppc32", "PowerPC 32");
static RegisterTarget<PPC64TargetMachine>
-Y("ppc64", " PowerPC 64");
+Y("ppc64", "PowerPC 64");
// No assembler printer by default
PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0;
Modified: llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/Sparc/SparcTargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -19,7 +19,7 @@
using namespace llvm;
// Register the target.
-static RegisterTarget<SparcTargetMachine> X("sparc", " SPARC");
+static RegisterTarget<SparcTargetMachine> X("sparc", "SPARC");
const TargetAsmInfo *SparcTargetMachine::createTargetAsmInfo() const {
// FIXME: Handle Solaris subtarget someday :)
Modified: llvm/trunk/lib/Target/TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/TargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -102,13 +102,13 @@
cl::init(Reloc::Default),
cl::values(
clEnumValN(Reloc::Default, "default",
- " Target default relocation model"),
+ "Target default relocation model"),
clEnumValN(Reloc::Static, "static",
- " Non-relocatable code"),
+ "Non-relocatable code"),
clEnumValN(Reloc::PIC_, "pic",
- " Fully relocatable, position independent code"),
+ "Fully relocatable, position independent code"),
clEnumValN(Reloc::DynamicNoPIC, "dynamic-no-pic",
- " Relocatable external references, non-relocatable code"),
+ "Relocatable external references, non-relocatable code"),
clEnumValEnd));
static cl::opt<llvm::CodeModel::Model, true>
DefCodeModel(
@@ -118,15 +118,15 @@
cl::init(CodeModel::Default),
cl::values(
clEnumValN(CodeModel::Default, "default",
- " Target default code model"),
+ "Target default code model"),
clEnumValN(CodeModel::Small, "small",
- " Small code model"),
+ "Small code model"),
clEnumValN(CodeModel::Kernel, "kernel",
- " Kernel code model"),
+ "Kernel code model"),
clEnumValN(CodeModel::Medium, "medium",
- " Medium code model"),
+ "Medium code model"),
clEnumValN(CodeModel::Large, "large",
- " Large code model"),
+ "Large code model"),
clEnumValEnd));
static cl::opt<bool, true>
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.cpp Tue Oct 14 15:25:08 2008
@@ -23,8 +23,8 @@
AsmWriterFlavor("x86-asm-syntax", cl::init(X86Subtarget::Unset),
cl::desc("Choose style of code to emit from X86 backend:"),
cl::values(
- clEnumValN(X86Subtarget::ATT, "att", " Emit AT&T-style assembly"),
- clEnumValN(X86Subtarget::Intel, "intel", " Emit Intel-style assembly"),
+ clEnumValN(X86Subtarget::ATT, "att", "Emit AT&T-style assembly"),
+ clEnumValN(X86Subtarget::Intel, "intel", "Emit Intel-style assembly"),
clEnumValEnd));
Modified: llvm/trunk/lib/Target/X86/X86TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86TargetMachine.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86TargetMachine.cpp Tue Oct 14 15:25:08 2008
@@ -32,9 +32,9 @@
// Register the target.
static RegisterTarget<X86_32TargetMachine>
-X("x86", " 32-bit X86: Pentium-Pro and above");
+X("x86", "32-bit X86: Pentium-Pro and above");
static RegisterTarget<X86_64TargetMachine>
-Y("x86-64", " 64-bit X86: EM64T and AMD64");
+Y("x86-64", "64-bit X86: EM64T and AMD64");
// No assembler printer by default
X86TargetMachine::AsmPrinterCtorFn X86TargetMachine::AsmPrinterCtor = 0;
Modified: llvm/trunk/tools/llc/llc.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/tools/llc/llc.cpp?rev=57521&r1=57520&r2=57521&view=diff
==============================================================================
--- llvm/trunk/tools/llc/llc.cpp (original)
+++ llvm/trunk/tools/llc/llc.cpp Tue Oct 14 15:25:08 2008
@@ -80,11 +80,11 @@
cl::desc("Choose a file type (not all types are supported by all targets):"),
cl::values(
clEnumValN(TargetMachine::AssemblyFile, "asm",
- " Emit an assembly ('.s') file"),
+ "Emit an assembly ('.s') file"),
clEnumValN(TargetMachine::ObjectFile, "obj",
- " Emit a native object ('.o') file [experimental]"),
+ "Emit a native object ('.o') file [experimental]"),
clEnumValN(TargetMachine::DynamicLibrary, "dynlib",
- " Emit a native dynamic library ('.so') file"
+ "Emit a native dynamic library ('.so') file"
" [experimental]"),
clEnumValEnd));
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