[llvm-commits] [llvm] r57380 - in /llvm/trunk/lib/Target/X86: X86.td X86CodeEmitter.cpp X86InstrFormats.td X86InstrInfo.h

[Mon Ping Wang]

Hi Anton,

Shouldn't we also increment the size for the overside segment in  
X86InstrInfo.cpp?

static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
                                     const TargetInstrDesc *Desc,
                                     bool IsPIC, bool Is64BitMode) {
   ...
   // Emit the operand size opcode prefix as needed.
   switch (Desc->TSFlags & X86II::SegOvrMask) {
   case X86II::FS:
     ++FinalSize;
     break;
   case X86II::GS:
     ++FinalSize;
     break;
   }
   ...

   -- Mon Ping

On Oct 11, 2008, at 12:09 PM, Anton Korobeynikov wrote:

> Author: asl
> Date: Sat Oct 11 14:09:15 2008
> New Revision: 57380
>
> URL: http://llvm.org/viewvc/llvm-project?rev=57380&view=rev
> Log:
> Add ability to override segment (mostly for code emitter purposes).
>
> Modified:
>    llvm/trunk/lib/Target/X86/X86.td
>    llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
>    llvm/trunk/lib/Target/X86/X86InstrFormats.td
>    llvm/trunk/lib/Target/X86/X86InstrInfo.h
>
> Modified: llvm/trunk/lib/Target/X86/X86.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=57380&r1=57379&r2=57380&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86.td (original)
> +++ llvm/trunk/lib/Target/X86/X86.td Sat Oct 11 14:09:15 2008
> @@ -116,6 +116,7 @@
>                        "ImmTypeBits",
>                        "FPFormBits",
>                        "hasLockPrefix",
> +                       "SegOvrBits",
>                        "Opcode"];
>   let TSFlagsShifts = [0,
>                        6,
> @@ -125,6 +126,7 @@
>                        13,
>                        16,
>                        19,
> +                       20,
>                        24];
> }
>
>
> Modified: llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp?rev=57380&r1=57379&r2=57380&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp (original)
> +++ llvm/trunk/lib/Target/X86/X86CodeEmitter.cpp Sat Oct 11 14:09:15  
> 2008
> @@ -412,6 +412,16 @@
>   // Emit the lock opcode prefix as needed.
>   if (Desc->TSFlags & X86II::LOCK) MCE.emitByte(0xF0);
>
> +  // Emit segment overrid opcode prefix as needed.
> +  switch (Desc->TSFlags & X86II::SegOvrMask) {
> +  case X86II::FS:
> +    MCE.emitByte(0x64);
> +    break;
> +  case X86II::GS:
> +    MCE.emitByte(0x65);
> +    break;
> +  }
> +
>   // Emit the repeat opcode prefix as needed.
>   if ((Desc->TSFlags & X86II::Op0Mask) == X86II::REP) MCE.emitByte 
> (0xF3);
>
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrFormats.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrFormats.td?rev=57380&r1=57379&r2=57380&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrFormats.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrFormats.td Sat Oct 11 14:09:15  
> 2008
> @@ -63,6 +63,8 @@
> class AdSize { bit hasAdSizePrefix = 1; }
> class REX_W  { bit hasREX_WPrefix = 1; }
> class LOCK   { bit hasLockPrefix = 1; }
> +class SegFS  { bits<2> SegOvrBits = 1; }
> +class SegGS  { bits<2> SegOvrBits = 2; }
> class TB     { bits<4> Prefix = 1; }
> class REP    { bits<4> Prefix = 2; }
> class D8     { bits<4> Prefix = 3; }
> @@ -104,6 +106,7 @@
>   FPFormat FPForm;          // What flavor of FP instruction is this?
>   bits<3> FPFormBits = 0;
>   bit hasLockPrefix = 0;    // Does this inst have a 0xF0 prefix?
> +  bits<2> SegOvrBits = 0;   // Segment override prefix.
> }
>
> class I<bits<8> o, Format f, dag outs, dag ins, string asm,  
> list<dag> pattern>
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.h
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.h?rev=57380&r1=57379&r2=57380&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.h (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.h Sat Oct 11 14:09:15 2008
> @@ -221,7 +221,14 @@
>     LOCKShift = 19,
>     LOCK = 1 << LOCKShift,
>
> -    // Bits 20 -> 23 are unused
> +    // Segment override prefixes. Currently we just need ability to  
> address
> +    // stuff in gs and fs segments.
> +    SegOvrShift = 20,
> +    SegOvrMask  = 3 << SegOvrShift,
> +    FS          = 1 << SegOvrShift,
> +    GS          = 2 << SegOvrShift,
> +
> +    // Bits 22 -> 23 are unused
>     OpcodeShift   = 24,
>     OpcodeMask    = 0xFF << OpcodeShift
>   };
>
>
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