[llvm-commits] [llvm] r57364 - /llvm/trunk/lib/Target/Sparc/SparcCallingConv.td

[Chris Lattner]

On Oct 10, 2008, at 1:30 PM, Anton Korobeynikov wrote:

> Author: asl
> Date: Fri Oct 10 15:30:14 2008
> New Revision: 57364
>
> URL: http://llvm.org/viewvc/llvm-project?rev=57364&view=rev
> Log:
> Extend set of return registers on sparc until someone will implement  
> MRV support there. At least, this will allow libgcc compile, however  
> we are not ABI-compatible with stuff compiled with native gcc.

hi Anton, does this change floats to return in F1 instead of F0?  That  
seems wrong.

-Chris

>
>
> Modified:
>    llvm/trunk/lib/Target/Sparc/SparcCallingConv.td
>
> Modified: llvm/trunk/lib/Target/Sparc/SparcCallingConv.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Sparc/SparcCallingConv.td?rev=57364&r1=57363&r2=57364&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/Sparc/SparcCallingConv.td (original)
> +++ llvm/trunk/lib/Target/Sparc/SparcCallingConv.td Fri Oct 10  
> 15:30:14 2008
> @@ -17,9 +17,9 @@
>
> // Sparc 32-bit C return-value convention.
> def RetCC_Sparc32 : CallingConv<[
> -  CCIfType<[i32], CCAssignToReg<[I0, I1]>>,
> -  CCIfType<[f32], CCAssignToReg<[F0]>>,
> -  CCIfType<[f64], CCAssignToReg<[D0]>>
> +  CCIfType<[i32], CCAssignToReg<[I0, I1, I2, I3, I4, I5]>>,
> +  CCIfType<[f32], CCAssignToReg<[F1, F3, F5, F7]>>,
> +  CCIfType<[f64], CCAssignToReg<[D0, D2]>>
> ]>;
>
> // Sparc 32-bit C Calling convention.
>
>
> _______________________________________________
> llvm-commits mailing list
> llvm-commits at cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits