[llvm-commits] [llvm] r57258 - in /llvm/trunk/lib/Target/ARM: ARMCodeEmitter.cpp ARMInstrInfo.h

[Chris Lattner]

On Oct 7, 2008, at 12:05 PM, Jim Grosbach wrote:
> Author: grosbach
> Date: Tue Oct  7 14:05:35 2008
> New Revision: 57258
>
> URL: http://llvm.org/viewvc/llvm-project?rev=57258&view=rev
> Log:
> Encode the conditional execution predicate when JITing.

Ok,

> +++ llvm/trunk/lib/Target/ARM/ARMCodeEmitter.cpp Tue Oct  7 14:05:35  
> 2008
> @@ -256,8 +256,8 @@
> unsigned ARMCodeEmitter::getAddrModeNoneInstrBinary(const  
> MachineInstr &MI,
>                                                     const  
> TargetInstrDesc &TID,
>                                                     unsigned Binary) {
> -  // FIXME: Assume CC is AL for now.
> -  Binary |= ARMCC::AL << 28;
> +  // Set the conditional execution predicate
> +  Binary |= II->getPredicate(&MI) << 28;

This makes the assumption that the ARMCC::CondCodes enums follows  
exactly with the encodings used by the ARM instruction set.  THis is a  
reasonable thing, but is a new requirement.  Please put a comment  
above the CondCodes enum that points out that the numbering *must*  
follow the ISA.

Thanks Jim,

-Chris