[llvm-commits] [llvm] r57262 - /llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

[Jim Grosbach]

Author: grosbach
Date: Tue Oct  7 16:08:09 2008
New Revision: 57262

URL: http://llvm.org/viewvc/llvm-project?rev=57262&view=rev
Log:
Unconditional branch instruction encoding fix. Needs to use ABI, not AXI, to get the proper opcode bits.

Modified:
    llvm/trunk/lib/Target/ARM/ARMInstrInfo.td

Modified: llvm/trunk/lib/Target/ARM/ARMInstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/ARM/ARMInstrInfo.td?rev=57262&r1=57261&r2=57262&view=diff

==============================================================================
--- llvm/trunk/lib/Target/ARM/ARMInstrInfo.td (original)
+++ llvm/trunk/lib/Target/ARM/ARMInstrInfo.td Tue Oct  7 16:08:09 2008
@@ -567,7 +567,7 @@
   // B is "predicable" since it can be xformed into a Bcc.
   let isBarrier = 1 in {
     let isPredicable = 1 in
-    def B : AXI<0xA, (outs), (ins brtarget:$target), Branch, "b $target",
+    def B : ABI<{0,1,0,1}, (outs), (ins brtarget:$target), Branch, "b $target",
                 [(br bb:$target)]>;
 
   let isNotDuplicable = 1, isIndirectBranch = 1 in {