[llvm-commits] [llvm] r57257 - /llvm/trunk/lib/Target/X86/X86InstrInfo.td

[Evan Cheng]

Hi Dale,

I think we ought to fix the bug in the local register allocator  
instead. Is it not checking for aliases or sub-registers somewhere?

Thanks,

Evan

On Oct 7, 2008, at 11:54 AM, Dale Johannesen wrote:

> Author: johannes
> Date: Tue Oct  7 13:54:28 2008
> New Revision: 57257
>
> URL: http://llvm.org/viewvc/llvm-project?rev=57257&view=rev
> Log:
> Model hardwired inputs & outputs of x86 8-bit divides correctly.
> Fixes local RA miscompilation of gcc.c-torture/execute/20020904-1.c - 
> O0.
>
>
> Modified:
>    llvm/trunk/lib/Target/X86/X86InstrInfo.td
>
> Modified: llvm/trunk/lib/Target/X86/X86InstrInfo.td
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrInfo.td?rev=57257&r1=57256&r2=57257&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/Target/X86/X86InstrInfo.td (original)
> +++ llvm/trunk/lib/Target/X86/X86InstrInfo.td Tue Oct  7 13:54:28 2008
> @@ -728,7 +728,7 @@
> }
>
> // unsigned division/remainder
> -let Defs = [AX,EFLAGS], Uses = [AL,AH] in
> +let Defs = [AL,AH,EFLAGS], Uses = [AX] in
> def DIV8r  : I<0xF6, MRM6r, (outs),  (ins GR8:$src),          // AX/ 
> r8 = AL,AH
>                "div{b}\t$src", []>;
> let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
> @@ -738,7 +738,7 @@
> def DIV32r : I<0xF7, MRM6r, (outs),  (ins GR32:$src),         //  
> EDX:EAX/r32 = EAX,EDX
>                "div{l}\t$src", []>;
> let mayLoad = 1 in {
> -let Defs = [AX,EFLAGS], Uses = [AL,AH] in
> +let Defs = [AL,AH,EFLAGS], Uses = [AX] in
> def DIV8m  : I<0xF6, MRM6m, (outs), (ins i8mem:$src),       // AX/ 
> [mem8] = AL,AH
>                "div{b}\t$src", []>;
> let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
> @@ -750,7 +750,7 @@
> }
>
> // Signed division/remainder.
> -let Defs = [AX,EFLAGS], Uses = [AL,AH] in
> +let Defs = [AL,AH,EFLAGS], Uses = [AX] in
> def IDIV8r : I<0xF6, MRM7r, (outs),  (ins GR8:$src),          // AX/ 
> r8 = AL,AH
>                "idiv{b}\t$src", []>;
> let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
> @@ -760,7 +760,7 @@
> def IDIV32r: I<0xF7, MRM7r, (outs),  (ins GR32:$src),         //  
> EDX:EAX/r32 = EAX,EDX
>                "idiv{l}\t$src", []>;
> let mayLoad = 1, mayLoad = 1 in {
> -let Defs = [AX,EFLAGS], Uses = [AL,AH] in
> +let Defs = [AL,AH,EFLAGS], Uses = [AX] in
> def IDIV8m : I<0xF6, MRM7m, (outs), (ins i8mem:$src),      // AX/ 
> [mem8] = AL,AH
>                "idiv{b}\t$src", []>;
> let Defs = [AX,DX,EFLAGS], Uses = [AX,DX] in
>
>
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