[llvm-commits] [llvm] r57039 - in /llvm/trunk: lib/CodeGen/RegAllocLocal.cpp test/CodeGen/X86/local-liveness.ll
Dan Gohman
gohman at apple.com
Fri Oct 3 17:31:16 PDT 2008
Author: djg
Date: Fri Oct 3 19:31:14 2008
New Revision: 57039
URL: http://llvm.org/viewvc/llvm-project?rev=57039&view=rev
Log:
Fix a bug in the local allocator's liveness computation where it
was setting kill flags on tied uses in two-address instructions.
The kill flags were causing the allocator to think it could
allocate the use and its tied def in different registers.
Added:
llvm/trunk/test/CodeGen/X86/local-liveness.ll
Modified:
llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
Modified: llvm/trunk/lib/CodeGen/RegAllocLocal.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLocal.cpp?rev=57039&r1=57038&r2=57039&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegAllocLocal.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegAllocLocal.cpp Fri Oct 3 19:31:14 2008
@@ -651,9 +651,11 @@
// Physical registers and those that are not live-out of the block
// are killed/dead at their last use/def within this block.
if (isPhysReg || !usedOutsideBlock) {
- if (MO.isUse())
- MO.setIsKill(true);
- else
+ if (MO.isUse()) {
+ // Don't mark uses that are tied to defs as kills.
+ if (MI->getDesc().getOperandConstraint(idx, TOI::TIED_TO) == -1)
+ MO.setIsKill(true);
+ } else
MO.setIsDead(true);
}
}
Added: llvm/trunk/test/CodeGen/X86/local-liveness.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/local-liveness.ll?rev=57039&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/local-liveness.ll (added)
+++ llvm/trunk/test/CodeGen/X86/local-liveness.ll Fri Oct 3 19:31:14 2008
@@ -0,0 +1,31 @@
+; RUN: llvm-as < %s | llc -march=x86 -regalloc=local | grep {subl %eax, %esi}
+
+; Local regalloc shouldn't assume that both the uses of the
+; sub instruction are kills, because one of them is tied
+; to an output. Previously, it was allocating both inputs
+; in the same register.
+
+define i32 @func_3() nounwind {
+entry:
+ %retval = alloca i32 ; <i32*> [#uses=2]
+ %g_323 = alloca i8 ; <i8*> [#uses=2]
+ %p_5 = alloca i64, align 8 ; <i64*> [#uses=2]
+ %0 = alloca i32 ; <i32*> [#uses=2]
+ %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
+ store i64 0, i64* %p_5, align 8
+ store i8 1, i8* %g_323, align 1
+ %1 = load i8* %g_323, align 1 ; <i8> [#uses=1]
+ %2 = sext i8 %1 to i64 ; <i64> [#uses=1]
+ %3 = load i64* %p_5, align 8 ; <i64> [#uses=1]
+ %4 = sub i64 %3, %2 ; <i64> [#uses=1]
+ %5 = icmp sge i64 %4, 0 ; <i1> [#uses=1]
+ %6 = zext i1 %5 to i32 ; <i32> [#uses=1]
+ store i32 %6, i32* %0, align 4
+ %7 = load i32* %0, align 4 ; <i32> [#uses=1]
+ store i32 %7, i32* %retval, align 4
+ br label %return
+
+return: ; preds = %entry
+ %retval1 = load i32* %retval ; <i32> [#uses=1]
+ ret i32 %retval1
+}
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