[llvm-commits] [llvm] r56937 - in /llvm/trunk: include/llvm/Target/TargetOptions.h lib/CodeGen/LLVMTargetMachine.cpp lib/CodeGen/LoopAligner.cpp lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp lib/Target/TargetMachine.cpp lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp lib/Target/X86/X86ISelDAGToDAG.cpp test/CodeGen/X86/vec_shuffle-23.ll test/CodeGen/X86/vec_shuffle-24.ll
Devang Patel
dpatel at apple.com
Wed Oct 1 16:18:38 PDT 2008
Author: dpatel
Date: Wed Oct 1 18:18:38 2008
New Revision: 56937
URL: http://llvm.org/viewvc/llvm-project?rev=56937&view=rev
Log:
Remove OptimizeForSize global. Use function attribute optsize.
Added:
llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll
Modified:
llvm/trunk/include/llvm/Target/TargetOptions.h
llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
llvm/trunk/lib/CodeGen/LoopAligner.cpp
llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
llvm/trunk/lib/Target/TargetMachine.cpp
llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
llvm/trunk/test/CodeGen/X86/vec_shuffle-23.ll
Modified: llvm/trunk/include/llvm/Target/TargetOptions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/Target/TargetOptions.h?rev=56937&r1=56936&r2=56937&view=diff
==============================================================================
--- llvm/trunk/include/llvm/Target/TargetOptions.h (original)
+++ llvm/trunk/include/llvm/Target/TargetOptions.h Wed Oct 1 18:18:38 2008
@@ -83,10 +83,6 @@
/// optimization (pop the caller's stack) providing it supports it.
extern bool PerformTailCallOpt;
- /// OptimizeForSize - When this flag is set, the code generator avoids
- /// optimizations that increase size.
- extern bool OptimizeForSize;
-
/// StackAlignment - Override default stack alignment for target.
extern unsigned StackAlignment;
Modified: llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp?rev=56937&r1=56936&r2=56937&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp (original)
+++ llvm/trunk/lib/CodeGen/LLVMTargetMachine.cpp Wed Oct 1 18:18:38 2008
@@ -81,7 +81,7 @@
if (addPreEmitPass(PM, Fast) && PrintMachineCode)
PM.add(createMachineFunctionPrinterPass(cerr));
- if (!Fast && !OptimizeForSize)
+ if (!Fast)
PM.add(createLoopAlignerPass());
switch (FileType) {
Modified: llvm/trunk/lib/CodeGen/LoopAligner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/LoopAligner.cpp?rev=56937&r1=56936&r2=56937&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/LoopAligner.cpp (original)
+++ llvm/trunk/lib/CodeGen/LoopAligner.cpp Wed Oct 1 18:18:38 2008
@@ -58,6 +58,10 @@
if (!Align)
return false; // Don't care about loop alignment.
+ const Function *F = MF.getFunction();
+ if (!F->isDeclaration() && F->hasFnAttr(Attribute::OptimizeForSize))
+ return false;
+
for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
MachineBasicBlock *MBB = I;
if (MLI->isLoopHeader(MBB))
Modified: llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp?rev=56937&r1=56936&r2=56937&view=diff
==============================================================================
--- llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/PowerPC/AsmPrinter/PPCAsmPrinter.cpp Wed Oct 1 18:18:38 2008
@@ -776,7 +776,7 @@
printVisibility(CurrentFnName, F->getVisibility());
- EmitAlignment(OptimizeForSize ? 2 : 4, F);
+ EmitAlignment(F->hasFnAttr(Attribute::OptimizeForSize) ? 2 : 4, F);
O << CurrentFnName << ":\n";
// Emit pre-function debug information.
Modified: llvm/trunk/lib/Target/TargetMachine.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/TargetMachine.cpp?rev=56937&r1=56936&r2=56937&view=diff
==============================================================================
--- llvm/trunk/lib/Target/TargetMachine.cpp (original)
+++ llvm/trunk/lib/Target/TargetMachine.cpp Wed Oct 1 18:18:38 2008
@@ -35,7 +35,6 @@
Reloc::Model RelocationModel;
CodeModel::Model CMModel;
bool PerformTailCallOpt;
- bool OptimizeForSize;
unsigned StackAlignment;
bool RealignStack;
bool VerboseAsm;
@@ -134,11 +133,6 @@
cl::desc("Turn on tail call optimization."),
cl::location(PerformTailCallOpt),
cl::init(false));
-static cl::opt<bool, true>
-EnableOptimizeForSize("optimize-size",
- cl::desc("Optimize for size."),
- cl::location(OptimizeForSize),
- cl::init(false));
static cl::opt<unsigned, true>
OverrideStackAlignment("stack-alignment",
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp?rev=56937&r1=56936&r2=56937&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp Wed Oct 1 18:18:38 2008
@@ -153,7 +153,7 @@
SwitchToSection(TAI->SectionForGlobal(F));
- unsigned FnAlign = OptimizeForSize ? 1 : 4;
+ unsigned FnAlign = 4;
if (!F->isDeclaration() && F->hasFnAttr(Attribute::OptimizeForSize))
FnAlign = 1;
switch (F->getLinkage()) {
Modified: llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp?rev=56937&r1=56936&r2=56937&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp (original)
+++ llvm/trunk/lib/Target/X86/AsmPrinter/X86IntelAsmPrinter.cpp Wed Oct 1 18:18:38 2008
@@ -140,7 +140,7 @@
SwitchToTextSection("_text", F);
- unsigned FnAlign = OptimizeForSize ? 1 : 4;
+ unsigned FnAlign = 4;
if (!F->isDeclaration() && F->hasFnAttr(Attribute::OptimizeForSize))
FnAlign = 1;
switch (F->getLinkage()) {
Modified: llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp?rev=56937&r1=56936&r2=56937&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelDAGToDAG.cpp Wed Oct 1 18:18:38 2008
@@ -137,7 +137,7 @@
ContainsFPCode(false), TM(tm),
X86Lowering(*TM.getTargetLowering()),
Subtarget(&TM.getSubtarget<X86Subtarget>()),
- OptForSize(OptimizeForSize) {}
+ OptForSize(false) {}
virtual const char *getPassName() const {
return "X86 DAG->DAG Instruction Selection";
Modified: llvm/trunk/test/CodeGen/X86/vec_shuffle-23.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-23.ll?rev=56937&r1=56936&r2=56937&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-23.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-23.ll Wed Oct 1 18:18:38 2008
@@ -1,6 +1,5 @@
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | not grep punpck
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep pshufd
-; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 -optimize-size | grep punpck
define i32 @t() nounwind {
entry:
Added: llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll?rev=56937&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll (added)
+++ llvm/trunk/test/CodeGen/X86/vec_shuffle-24.ll Wed Oct 1 18:18:38 2008
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse2 | grep punpck
+
+define i32 @t() nounwind optsize {
+entry:
+ %a = alloca <4 x i32> ; <<4 x i32>*> [#uses=2]
+ %b = alloca <4 x i32> ; <<4 x i32>*> [#uses=5]
+ volatile store <4 x i32> < i32 0, i32 1, i32 2, i32 3 >, <4 x i32>* %a
+ %tmp = load <4 x i32>* %a ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %tmp, <4 x i32>* %b
+ %tmp1 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
+ %tmp2 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
+ %punpckldq = shufflevector <4 x i32> %tmp1, <4 x i32> %tmp2, <4 x i32> < i32 0, i32 4, i32 1, i32 5 > ; <<4 x i32>> [#uses=1]
+ store <4 x i32> %punpckldq, <4 x i32>* %b
+ %tmp3 = load <4 x i32>* %b ; <<4 x i32>> [#uses=1]
+ %result = extractelement <4 x i32> %tmp3, i32 0 ; <i32> [#uses=1]
+ ret i32 %result
+}
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