[llvm-commits] [llvm] r56615 - /llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

[Dan Gohman]

Author: djg
Date: Thu Sep 25 12:22:52 2008
New Revision: 56615

URL: http://llvm.org/viewvc/llvm-project?rev=56615&view=rev
Log:
Support for i1 XOR in FastISel. It is actually safe because
i1 operands are assumed to already by zero-extended.

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp?rev=56615&r1=56614&r2=56615&view=diff

==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/FastISel.cpp Thu Sep 25 12:22:52 2008
@@ -135,10 +135,11 @@
   // under the assumption that i64 won't be used if the target doesn't
   // support it.
   if (!TLI.isTypeLegal(VT)) {
-    // MVT::i1 is special. Allow AND and OR (but not XOR) because they
+    // MVT::i1 is special. Allow AND, OR, or XOR because they
     // don't require additional zeroing, which makes them easy.
     if (VT == MVT::i1 &&
-        (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR))
+        (ISDOpcode == ISD::AND || ISDOpcode == ISD::OR ||
+         ISDOpcode == ISD::XOR))
       VT = TLI.getTypeToTransformTo(VT);
     else
       return false;