[llvm-commits] [llvm] r55807 - in /llvm/trunk: lib/Target/X86/X86CallingConv.td lib/Target/X86/X86ISelLowering.cpp test/CodeGen/X86/2007-08-13-SpillerReuse.ll test/CodeGen/X86/2008-02-22-ReMatBug.ll test/CodeGen/X86/coalescer-commute3.ll test/CodeGen/X86/combine-lds.ll test/CodeGen/X86/fastcc.ll

Evan Cheng evan.cheng at apple.com
Sun Sep 21 23:30:38 PDT 2008


On Sep 21, 2008, at 12:47 PM, Chris Lattner wrote:

>
> On Sep 4, 2008, at 3:59 PM, Evan Cheng wrote:
>
>> Author: evancheng
>> Date: Thu Sep  4 17:59:58 2008
>> New Revision: 55807
>>
>> URL: http://llvm.org/viewvc/llvm-project?rev=55807&view=rev
>> Log:
>> For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was  
>> not passing scalar arguments in registers. This patch defines a new  
>> fastcc CC which is slightly different from the FastCall CC. In  
>> addition to passing integer arguments in ECX and EDX, it also  
>> specify doubles are passed in 8-byte slots which are 8-byte aligned  
>> (instead of 4-byte aligned). This avoids a potential performance  
>> hazard where doubles span cacheline boundaries.
>
> Okay, cool but:
>
>> @@ -1100,6 +1100,8 @@
>>    return CC_X86_32_FastCall;
>>  else if (CC == CallingConv::Fast && PerformTailCallOpt)
>>    return CC_X86_32_TailCall;
>> +  else if (CC == CallingConv::Fast)
>> +    return CC_X86_32_FastCC;
>
> Does this mean that "PerformTailCallOpt" changes the ABI?

Looks that way. The difference is rather confusing:

TailCall:
   // Nested function trampolines are currently not supported by fastcc.

   // The first 3 integer arguments, if marked 'inreg' and if the call  
is not
   // a vararg call, are passed in integer registers.
   CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX]>>>>,

FastCC:
   // The 'nest' parameter, if any, is passed in EAX.
   CCIfNest<CCAssignToReg<[EAX]>>,

   // The first 2 integer arguments are passed in ECX/EDX
   CCIfType<[i32], CCAssignToReg<[ECX, EDX]>>,

First of all, the comment about "nested function not being supported  
by fastcc" looks wrong. Secondly, it's not clear to me why the integer  
registers have to be marked inreg to be passed in registers (only EAX,  
EDX, what's the 3rd). Arnold, any ideas?

Evan




>
>
> -Chris
>




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