[llvm-commits] [llvm] r56384 - in /llvm/trunk/lib/CodeGen: RegAllocLinearScan.cpp SimpleRegisterCoalescing.cpp

[Chris Lattner]

On Sep 19, 2008, at 7:03 PM, Dale Johannesen wrote:

> Author: johannes
> Date: Fri Sep 19 21:03:04 2008
> New Revision: 56384
>
> URL: http://llvm.org/viewvc/llvm-project?rev=56384&view=rev
> Log:
> Teach coalescer about earlyclobber bits.
> Check bits for preferred register.

If you model the early clobber def as starting one slot early, it will  
explicitly conflict with all inputs to the asm, and this can be backed  
out.

-Chris

>
>
>
> Modified:
>    llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
>    llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
>
> Modified: llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp?rev=56384&r1=56383&r2=56384&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp (original)
> +++ llvm/trunk/lib/CodeGen/RegAllocLinearScan.cpp Fri Sep 19  
> 21:03:04 2008
> @@ -1122,9 +1122,12 @@
>   unsigned FreeRegInactiveCount = 0;
>
>   // If copy coalescer has assigned a "preferred" register, check if  
> it's
> -  // available first.
> +  // available first.  Coalescer can create new earlyclobber  
> interferences,
> +  // so we need to check that.
>   if (cur->preference) {
> -    if (prt_->isRegAvail(cur->preference) && RC->contains(cur- 
> >preference)) {
> +    if (prt_->isRegAvail(cur->preference) &&
> +        RC->contains(cur->preference) &&
> +        noEarlyClobberConflict(cur, cur->preference)) {
>       DOUT << "\t\tassigned the preferred register: "
>            << tri_->getName(cur->preference) << "\n";
>       return cur->preference;
>
> Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
> URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=56384&r1=56383&r2=56384&view=diff
>
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> = 
> ======================================================================
> --- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
> +++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Fri Sep 19  
> 21:03:04 2008
> @@ -1206,6 +1206,14 @@
>   DOUT << " and "; DstInt.print(DOUT, tri_);
>   DOUT << ": ";
>
> +  // If one interval is earlyclobber and the other is overlaps- 
> earlyclobber,
> +  // we cannot coalesce them.
> +  if ((SrcInt.isEarlyClobber && DstInt.overlapsEarlyClobber) ||
> +      (DstInt.isEarlyClobber && SrcInt.overlapsEarlyClobber)) {
> +    DOUT << "\t\tCannot join due to earlyclobber.";
> +    return false;
> +  }
> +
>   // Check if it is necessary to propagate "isDead" property.
>   if (!isExtSubReg && !isInsSubReg) {
>     MachineOperand *mopd = CopyMI->findRegisterDefOperand(DstReg,  
> false);
> @@ -1366,6 +1374,10 @@
>   if (TargetRegisterInfo::isVirtualRegister(DstReg))
>     RemoveUnnecessaryKills(DstReg, *ResDstInt);
>
> +  // Merge the earlyclobber bits.
> +  ResDstInt->isEarlyClobber |= ResSrcInt->isEarlyClobber;
> +  ResDstInt->overlapsEarlyClobber |= ResSrcInt->overlapsEarlyClobber;
> +
>   if (isInsSubReg)
>     // Avoid:
>     // r1024 = op
>
>
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