[llvm-commits] [llvm] r56287 - in /llvm/trunk: lib/CodeGen/SimpleRegisterCoalescing.cpp test/CodeGen/ARM/2008-09-17-CoalescerBug.ll
Evan Cheng
evan.cheng at apple.com
Wed Sep 17 11:36:25 PDT 2008
Author: evancheng
Date: Wed Sep 17 13:36:25 2008
New Revision: 56287
URL: http://llvm.org/viewvc/llvm-project?rev=56287&view=rev
Log:
Unallocatable registers do not have live intervals.
Added:
llvm/trunk/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll
Modified:
llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
Modified: llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp?rev=56287&r1=56286&r2=56287&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp (original)
+++ llvm/trunk/lib/CodeGen/SimpleRegisterCoalescing.cpp Wed Sep 17 13:36:25 2008
@@ -568,7 +568,9 @@
unsigned CopySrcReg, CopyDstReg;
if (TID.getNumDefs() == 1 && TID.getNumOperands() > 2 &&
tii_->isMoveInstr(*UseMI, CopySrcReg, CopyDstReg) &&
- CopySrcReg != CopyDstReg) {
+ CopySrcReg != CopyDstReg &&
+ (TargetRegisterInfo::isVirtualRegister(CopyDstReg) ||
+ allocatableRegs_[CopyDstReg])) {
LiveInterval &LI = li_->getInterval(CopyDstReg);
unsigned DefIdx = li_->getDefIndex(li_->getInstructionIndex(UseMI));
const LiveRange *DLR = LI.getLiveRangeContaining(DefIdx);
Added: llvm/trunk/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll?rev=56287&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll (added)
+++ llvm/trunk/test/CodeGen/ARM/2008-09-17-CoalescerBug.ll Wed Sep 17 13:36:25 2008
@@ -0,0 +1,17 @@
+; RUN: llvm-as < %s | llc -mtriple=arm-apple-darwin
+
+define void @gcov_exit() nounwind {
+entry:
+ br i1 false, label %bb24, label %bb33.thread
+
+bb24: ; preds = %entry
+ br label %bb39
+
+bb33.thread: ; preds = %entry
+ %0 = alloca i8, i32 0 ; <i8*> [#uses=1]
+ br label %bb39
+
+bb39: ; preds = %bb33.thread, %bb24
+ %.reg2mem.0 = phi i8* [ %0, %bb33.thread ], [ null, %bb24 ] ; <i8*> [#uses=0]
+ ret void
+}
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